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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: DM4PR12MB5769.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 29d8a4af-1396-4832-1584-08db1a4c0ca8 X-MS-Exchange-CrossTenant-originalarrivaltime: 01 Mar 2023 11:56:53.4611 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: 4Y+mIEc9kNi1ikl1MYxyQVIp/nk0yr8v8zEClKVe8voS/gNCOi26mHnImHb1uUdbuVkyF6oxHe0y/t6FCCLmvw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB8270 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > -----Original Message----- > From: Jason Gunthorpe > Sent: 28 February 2023 17:58 > To: Jarkko Sakkinen > Cc: Krishna Yarlagadda ; robh+dt@kernel.org; > broonie@kernel.org; peterhuewe@gmx.de; > krzysztof.kozlowski+dt@linaro.org; linux-spi@vger.kernel.org; linux- > tegra@vger.kernel.org; linux-integrity@vger.kernel.org; linux- > kernel@vger.kernel.org; thierry.reding@gmail.com; Jonathan Hunter > ; Sowjanya Komatineni > ; Laxman Dewangan > Subject: Re: [Patch V5 2/3] tpm_tis-spi: Support hardware wait polling >=20 > On Tue, Feb 28, 2023 at 04:36:26AM +0200, Jarkko Sakkinen wrote: > > On Mon, Feb 27, 2023 at 05:37:01PM +0530, Krishna Yarlagadda wrote: > > > TPM devices raise wait signal on last addr cycle. This can be detecte= d > > > by software driver by reading MISO line on same clock which requires > > > full duplex support. In case of half duplex controllers wait detectio= n > > > has to be implemented in HW. > > > Support hardware wait state detection by sending entire message and l= et > > > controller handle flow control. > > > > When a is started sentence with the word "support" it translates to "I'= m > > too lazy to write a proper and verbose description of the implementatio= n" > > :-) > > > > It has some abstract ideas of the implementation, I give you that, but = do > > you think anyone ever will get any value of reading that honestly? A bi= t > > more concrette description of the change helps e.g. when bisecting bugs= . >=20 > I would expect SPI_TPM_HW_FLOW to be documented in the kdocs to a > level that any other HW could implement it as well. HW implementation can be controller specific. I would add comments in the header to say CMD-ADDR-DATA is sent as single message with this flag. >=20 > > > +int tpm_tis_spi_transfer(struct tpm_tis_data *data, u32 addr, u16 le= n, > > > + u8 *in, const u8 *out) > > > +{ > > > + struct tpm_tis_spi_phy *phy =3D to_tpm_tis_spi_phy(data); > > > + struct spi_controller *ctlr =3D phy->spi_device->controller; > > > + > > > + /* > > > + * TPM flow control over SPI requires full duplex support. > > > + * Send entire message to a half duplex controller to handle > > > + * wait polling in controller. > > > + * Set TPM HW flow control flag.. > > > + */ > > > + if (ctlr->flags & SPI_CONTROLLER_HALF_DUPLEX) { > > > + phy->spi_device->mode |=3D SPI_TPM_HW_FLOW; >=20 > Shouldn't we check that this special flow is supported when the SPI > device is bound to the tpm in the first place? TPM device connected behind half duplex controller can only work this way. So, no additional flag needed to check. KY >=20 > Jason