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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?JTWhNZT90gLfibXosdGIYwHLWJ/z7V80hYNEim1R2J+EpyEL+kACS2uQg9OO?= =?us-ascii?Q?s87w/2XEMCIeN76wWZYngOsiG7ZEb2ynT2Pu/BRn9/BPBmGk2CUL0opkrilS?= =?us-ascii?Q?G4MNWTgk7AfySzS1mGyVgCuic4Owx9Gv/U+facktEh8YJVFkfv+wKNMbrJq4?= =?us-ascii?Q?u6JQ71TssrveKxUcxM6Phj3rpBdvuPvb0ou2gpleM9SKfgGc0GmESPV9DPfS?= =?us-ascii?Q?Rj7KsZlKhEVs1V6jjZc4qRdheTbvJtBrCL8wbPonmSvPmuSV+yOAdDLmdvuE?= =?us-ascii?Q?6QAQrsbnyQpBCc33n6q5yyqYZO0/3FoR4wXmjLxXYoWC/OpfxCH4cbxL3ILS?= =?us-ascii?Q?7xLqEDAjaj8obIL8Nqo6KdkHzSo3GENx0aDWTCoiNeVdNgB3iwtmC0WZaGfo?= =?us-ascii?Q?kC2IfcdKlNJtZVX8bNX9T4RfhWRHPXXvOzuOV54lQCxR/UJUdDA1Mdkr2yBx?= =?us-ascii?Q?w4WyA2YF/ePUCK15KOBpK34XF+BVKl70932bM5qShScZSC9GIwv4E6TdGSCK?= =?us-ascii?Q?CEXSUoR2nAFtTP+zQhzmtVqw04br6FXANsB4QJ3g55tWj8gV/pCiZ295Dp0h?= =?us-ascii?Q?crUCRUG5XzEHMSnZvCMU7iVgW47egESa5CUTx4B3+Yo0w8DoKg7WSGKOe+69?= =?us-ascii?Q?ziTgav9LgvvvErfvgc/Ha4zmG6kWxMhbLSZ8mTob5nlg86Exhwmt0OBMplI3?= =?us-ascii?Q?1/VqW+tiyQgGk6Isg8OCEnMf2jFGEKC9P/EgFZrk1PuZNOefpujaut05X5SG?= =?us-ascii?Q?zzvFuLiYkF9VPttzx2Z2xHdqHthrdLMe1FsMavNPBgYr85XjbT7/vJjnBG9g?= =?us-ascii?Q?iuE6jCzSMK67PJR2z6T/UdFzPXol8pBTE/2FfxHdphbiMsaBUqc+Fo+IHqxu?= =?us-ascii?Q?J9i9G8gwMJHK2DJKr6vaFvZaMLm9L9p6GInVuAOX6D38pnLzureyPMlDhmda?= =?us-ascii?Q?GsTQLz8CG8WKS+BAOuCBPXRGwqJoy7HH2na6imeEDStrH/Bf/ruJ2iqqD5hP?= =?us-ascii?Q?6skA/vCb11nhi80J3A3GyP0Oo+CqRiAc2sSer4zrRcjfh+6r9Nj4SrTp31Qu?= =?us-ascii?Q?cuRjVtFHBEaobXRBInBCVdZfd+nrt4UgndlV84XOnPnI0k6MHmjuPgn/+xmR?= =?us-ascii?Q?4kQIWGtms3K17q7GjzEeNOwD5lIPGWeyIDOToYzxIPgIsK/LUkU9gTST1WLJ?= =?us-ascii?Q?sWuGa07d+iogItpRQtxGvRJuABV25isuj1qpvb/zAb+owHKMgkAuPttmLzdN?= =?us-ascii?Q?8NnfusokjUuZFX9nDpxZ4tTtfp72Pcdibcz4Ox4K62+0T5s2K5sRsUPVZOT4?= =?us-ascii?Q?+GLSVyqwmYQ5O7BAhYODahSMVHUUku91pF8IWhf/f9kLfpcDJJSRm56OjAlS?= =?us-ascii?Q?z0ma2t4aJfGAOmyckNBLUa4moxPFYlEsr73VSQ6L1jEaTK1SVVRcprW4biP/?= =?us-ascii?Q?4fNdQYh0AEmzv916zjVMWf5ktwC/ea7DGSndMZ0T8jqNq9zQsUj2iMlM+7/n?= =?us-ascii?Q?8h7VSQKQOhWz7ZJyr9ryH/5EY7eeMBffv8fkyqhqnO9mQw0zDo1Hh8eDaJOD?= =?us-ascii?Q?ZF4OS+t2M1dH6RKwvJD4Sfcj9PlWiOcaOStj+QyF?= X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-Network-Message-Id: b3f534aa-e353-41cc-efd3-08db1a505d41 X-MS-Exchange-CrossTenant-AuthSource: LV2PR12MB5869.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Mar 2023 12:27:46.9083 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 81S9Rhlu+BIJirFv1tDYWqGQxWeJc2q1EYUxBKgCsVVboZrhTlV159CRF5EOTlmi X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY5PR12MB6300 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Mar 01, 2023 at 11:56:53AM +0000, Krishna Yarlagadda wrote: > > > > +int tpm_tis_spi_transfer(struct tpm_tis_data *data, u32 addr, u16 len, > > > > + u8 *in, const u8 *out) > > > > +{ > > > > + struct tpm_tis_spi_phy *phy = to_tpm_tis_spi_phy(data); > > > > + struct spi_controller *ctlr = phy->spi_device->controller; > > > > + > > > > + /* > > > > + * TPM flow control over SPI requires full duplex support. > > > > + * Send entire message to a half duplex controller to handle > > > > + * wait polling in controller. > > > > + * Set TPM HW flow control flag.. > > > > + */ > > > > + if (ctlr->flags & SPI_CONTROLLER_HALF_DUPLEX) { > > > > + phy->spi_device->mode |= SPI_TPM_HW_FLOW; > > > > Shouldn't we check that this special flow is supported when the SPI > > device is bound to the tpm in the first place? > TPM device connected behind half duplex controller can only work > this way. So, no additional flag needed to check. Just because a DT hooks it up this way doesn't mean the kernel driver can support it, eg support hasn't been implemented in an older SPI driver or something. If the failure mode is anything other than the TPM doesn't probe we will need to check for support. Jason