Message-ID: <fc274097-93f5-1f01-952f-dda06b5ddaff@nvidia.com>
Date:   Wed, 1 Mar 2023 13:51:42 +0000
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Subject: Re: [Patch V6 3/3] spi: tegra210-quad: Enable TPM wait polling
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To:     Krishna Yarlagadda <kyarlagadda@nvidia.com>, robh+dt@kernel.org,
        broonie@kernel.org, peterhuewe@gmx.de, jgg@ziepe.ca,
        jarkko@kernel.org, krzysztof.kozlowski+dt@linaro.org,
        linux-spi@vger.kernel.org, linux-tegra@vger.kernel.org,
        linux-integrity@vger.kernel.org, linux-kernel@vger.kernel.org
Cc:     thierry.reding@gmail.com, skomatineni@nvidia.com,
        ldewangan@nvidia.com
References: <20230227172108.8206-1-kyarlagadda@nvidia.com>
 <20230227172108.8206-4-kyarlagadda@nvidia.com>
From:   Jon Hunter <jonathanh@nvidia.com>
In-Reply-To: <20230227172108.8206-4-kyarlagadda@nvidia.com>
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On 27/02/2023 17:21, Krishna Yarlagadda wrote:
> Trusted Platform Module requires flow control. As defined in TPM
> interface specification, client would drive MISO line at same cycle as
> last address bit on MOSI.
> Tegra241 QSPI controller has TPM wait state detection feature which is
> enabled for TPM client devices reported in SPI device mode bits.

Earlier in patch 2/3 we say Tegra234 and Tegra241 but here we just say 
Tegra241.

>   static struct tegra_qspi_soc_data tegra186_qspi_soc_data = {
>   	.has_dma = true,
>   	.cmb_xfer_capable = true,
> +	.support_tpm = false,
>   	.cs_count = 1,
>   };
>   
>   static struct tegra_qspi_soc_data tegra234_qspi_soc_data = {
>   	.has_dma = false,
>   	.cmb_xfer_capable = true,
> +	.support_tpm = true,
>   	.cs_count = 1,
>   };
>   
>   static struct tegra_qspi_soc_data tegra241_qspi_soc_data = {
>   	.has_dma = false,
>   	.cmb_xfer_capable = true,
> +	.support_tpm = true,
>   	.cs_count = 4,
>   };
>   

We enable for both Tegra234 and Tegra241 and so the commit message 
should say so.

Jon

-- 
nvpublic