Date:   Wed, 1 Mar 2023 15:09:24 +0100
From:   Thierry Reding <thierry.reding@gmail.com>
To:     Jason Gunthorpe <jgg@nvidia.com>
Cc:     Mark Brown <broonie@kernel.org>,
        Krishna Yarlagadda <kyarlagadda@nvidia.com>,
        Jarkko Sakkinen <jarkko@kernel.org>,
        "robh+dt@kernel.org" <robh+dt@kernel.org>,
        "peterhuewe@gmx.de" <peterhuewe@gmx.de>,
        "krzysztof.kozlowski+dt@linaro.org" 
        <krzysztof.kozlowski+dt@linaro.org>,
        "linux-spi@vger.kernel.org" <linux-spi@vger.kernel.org>,
        "linux-tegra@vger.kernel.org" <linux-tegra@vger.kernel.org>,
        "linux-integrity@vger.kernel.org" <linux-integrity@vger.kernel.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        Jonathan Hunter <jonathanh@nvidia.com>,
        Sowjanya Komatineni <skomatineni@nvidia.com>,
        Laxman Dewangan <ldewangan@nvidia.com>
Subject: Re: [Patch V5 2/3] tpm_tis-spi: Support hardware wait polling
Message-ID: <Y/9clKU9lAHxvOdd@orome>
References: <20230227120702.13180-1-kyarlagadda@nvidia.com>
 <20230227120702.13180-3-kyarlagadda@nvidia.com>
 <Y/1oqr0RfD7KVA4y@kernel.org>
 <Y/3zVdgnVz8BvGGl@ziepe.ca>
 <DM4PR12MB576942B7C00F446BDF58D984C3AD9@DM4PR12MB5769.namprd12.prod.outlook.com>
 <Y/9EwTtmxcVBjiHz@nvidia.com>
 <Y/9HB/KF2Kjkihkg@sirena.org.uk>
 <Y/9VkGjCP48FHtyS@nvidia.com>
MIME-Version: 1.0
Content-Type: multipart/signed; micalg=pgp-sha256;
        protocol="application/pgp-signature"; boundary="L7TwG/A0jb5em9Jb"
Content-Disposition: inline
In-Reply-To: <Y/9VkGjCP48FHtyS@nvidia.com>
User-Agent: Mutt/2.2.9 (2022-11-12)
Precedence: bulk


--L7TwG/A0jb5em9Jb
Content-Type: text/plain; charset=us-ascii
Content-Disposition: inline
Content-Transfer-Encoding: quoted-printable

On Wed, Mar 01, 2023 at 09:39:28AM -0400, Jason Gunthorpe wrote:
> On Wed, Mar 01, 2023 at 12:37:27PM +0000, Mark Brown wrote:
> > On Wed, Mar 01, 2023 at 08:27:45AM -0400, Jason Gunthorpe wrote:
> > > On Wed, Mar 01, 2023 at 11:56:53AM +0000, Krishna Yarlagadda wrote:
> >=20
> > > > TPM device connected behind half duplex controller can only work
> > > > this way. So, no additional flag needed to check.
> >=20
> > > Just because a DT hooks it up this way doesn't mean the kernel driver
> > > can support it, eg support hasn't been implemented in an older SPI
> > > driver or something.
> >=20
> > > If the failure mode is anything other than the TPM doesn't probe we
> > > will need to check for support.
> >=20
> > It's not like these buses are hot pluggable - someone would have to
> > design and manufacture a board which doesn't work.  It's probably
> > reasonable for this to fail with the SPI subsystem saying it can't
> > support things when the operation is tried.
>=20
> If the spi subsystem fails this request with these flags that would be
> great, it would cause the TPM to fail probing reliably.
>=20
> But does this patch do that? It looks like non-supporting half duplex
> drivers will just ignore the new flag?

I think the assumption is that there are currently no half duplex
drivers that would be impacted by this. If I understand correctly, the
TPM driver currently supports only full duplex controllers, because
that's required in order to detect the wait state in software.

So, yes, half duplex controllers would ignore this flag, but since they
couldn't have supported TPM flow control before anyway it doesn't make a
difference.

Thierry

--L7TwG/A0jb5em9Jb
Content-Type: application/pgp-signature; name="signature.asc"

-----BEGIN PGP SIGNATURE-----

iQIzBAABCAAdFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmP/XJIACgkQ3SOs138+
s6E0sA//aMFMddr/WWIey7Ad32TSDXrGtSEPVXMk5rWm6crWKj7Py6JqCe/y+q8J
uVjrk8XOsPW/YfZnPrdjQMyJ9Kke+SqFrptQ2Dy08/6szO08PURxs5vfs773EYxG
viQywY/kNpaRkPUrpkSTGtwJDI3/OruuxJ539FEwwF3uPeRGykYv5BngON/2Dymo
kvwRaIs/nQXtYDX/RAPPXyPbFgpRPKYE2MvEqbZ9z2gsc6BJUkYn65PcTmnARFho
WuUbkltRjAFtKDlhfiOmetPQGi5COUsitMHM2gI6zqpH09mznnTo7ilwMvKP2UGd
aoGRmyyV0L3a3WpMa9okjDMutqeBCNKle3q9n7ezf1Ztz8d8yRUap/VLYOjHlrt6
4M2j2L7PmZaKXSKKp91+Sky5m+2c0ZX7l1o5ahIquZtLULcSCPKpVdz2rfAwDN2N
iFITSw9PyfKX7clGSJ3T8Gbr+TUm6HnG6bmTU4CFs64rolmg2JM4Tj8HJYAK+DDj
/J3iYwdduA5jdOpwFEFmhwnb0XMVVYRCufIFER1Ix7cG1WMJPpPr+zHC490/Gom+
Cq54KRs2WXRXlolOmEmnsQN3iZ0tBQPHuNkJmOmQLnWhDXkNzmYMU/BiPH/WZV/A
CoHwTOX/uP6FUeYJtNeXrCCz/x8gaLfG3kz9+1Ps31oO0urBnVg=
=RWuP
-----END PGP SIGNATURE-----

--L7TwG/A0jb5em9Jb--