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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?3RUE1/6JAq7kQ7hzuP5lNHC3kCOMJUEtW3Pgw5S4cpY41t5goBsG6zqEMDfS?= =?us-ascii?Q?ZI7tBK2geqwzoLEvkXfj4yEjBUMwqEYFghpncc4yH9Vu+qcF23HBN1YUdxFV?= =?us-ascii?Q?nfoyItrNzKLjg9Jk79wceiZ2VaG3Ah1KnCkmap5xfX8ERLnNG3XqsYI43SNh?= =?us-ascii?Q?ZVTp6so5LbZV1xWsaEZC1t71dFVP7JsFaMzOuZvm+Uyb7DXZR2N4eQuSYFMi?= =?us-ascii?Q?OFoE2/h/iQ/oN8FqB7u+DLetYXZw4pRIn/RAMPFRRT5v/AflqzJgkYL4Ir+D?= =?us-ascii?Q?9o076zmSKKP1qEPCwpQjzQP9VIrXAArOLSl6mkdrlJzXf8Qtaaz51HUUUmuW?= =?us-ascii?Q?DVMfK9Z04oQlI8VzyvyQAiRogImI3+kapGXXFBXGOzohT0zbmtGIxd6XQLcC?= =?us-ascii?Q?TmDvD908cPGA76Lorab1AvbJsU3Pg2n6y3cLsi1XU1TgviON58SQA5kpjxYv?= =?us-ascii?Q?SyceUd973vvFTigB1RuRByZpNDmbrB+Kcriatuy9QL++CXpGRDP5s5pbX9Yu?= =?us-ascii?Q?chfIDQ1z8SdTbaVwm2LNiDFWm8Csb1Iins4maxgMybJimGDTGApxDpoLTYUt?= =?us-ascii?Q?w+jYB3m1ZXaJe+SekT8oD6K2+NYeeFNvzx9LAxP8nCPI61phIxj5yHMLxz1j?= =?us-ascii?Q?3DD4sD0YTfw7ZHveESXsQbfKbkFwxAboDo3se4MXRYffKDEm/aIz9z8azokI?= =?us-ascii?Q?PTc8jadSnLyk5+TN1uvOvuU+eWwDClT2H0/NRMNVqHuHFCdDiQQAldTiV+Mt?= =?us-ascii?Q?l/1axGtQkzLtMD2amrd/bl+TxYMOBPf/iL/LJEDQiavt5uoDOs36+PYxYDaM?= =?us-ascii?Q?JKmTVmyI/AJx0yLO/TwCS8Yd7892aGeFwIpIhNcNiPxbgLp0BWn5Xacg2zye?= =?us-ascii?Q?CXIxF71DqN+z5HN4h52leyojuvg+JCBNMXYE+1SLycLmUy4ndy+H039cCTJm?= =?us-ascii?Q?bfNjY+HERjSzWFv52bAUod6KN6DI+vKWbI5gFvSjZLLRnU+2FmelVDo1eICR?= =?us-ascii?Q?xnml/MaDTwycTpwcSjIQufixDMxrIMcYeB9wVwW00qFh0yMYIuABxDw0bNOH?= =?us-ascii?Q?RZ7SVmUqUJBsbFOOB0YfoEH5PKvbwWcjrfuCPG5FCFdngnXIRnUNDpWH6EsF?= =?us-ascii?Q?IlYkBWTiKleLypMV8tkgw33e0Xr3/4ueQ0Fbw/YiOqVxDxYCjSQmB1e92UW6?= =?us-ascii?Q?xHb+Vjq1rby3ioj1SHddrWafhWpr/rDJJwbcoH4bSSdu/SFYOm4uA6DMioC+?= =?us-ascii?Q?BMlPQi2urEGrwGN3n+hbZ/ckj+0FJAuFs6N5EEIYGNU5BVldUXGyxSnWCe3k?= =?us-ascii?Q?FgxFfpmECoWW2e6ea6hL1BZGzMZtjEEIrWLwehdAUlQ2r31tAHeCACqmR8iw?= =?us-ascii?Q?EAPdLmT+s6mkVZS2N02Ftu3mwZunR+KFC8H1/Q/1vVZ+24AWkdoD6QyDMIit?= =?us-ascii?Q?KEKeOs9Uha4IanXM4DgVP0kGFgurQhL/aGjmn00/TeV6P+KHOP91CEgXOj0D?= =?us-ascii?Q?+hFv0hSyFe039ROXVdeXRFquVaV1h1QuJmMI68FWj27vP17dvozp0cx1hudn?= =?us-ascii?Q?DRrziamWLSQ342JJHfKgWgbOsxd/viZsrvrL5VFv?= X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-Network-Message-Id: 7f6f6106-dde0-46c0-f0a9-08db1a6b05fa X-MS-Exchange-CrossTenant-AuthSource: LV2PR12MB5869.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Mar 2023 15:38:37.0336 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: oQpcIefbSRw33/jSZfJ8G1JoH/6CI1sBZwIcuY6dBLxVeXRyjBaF3RV9+J87UJQb X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH0PR12MB7863 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Mar 01, 2023 at 03:09:24PM +0100, Thierry Reding wrote: > On Wed, Mar 01, 2023 at 09:39:28AM -0400, Jason Gunthorpe wrote: > > On Wed, Mar 01, 2023 at 12:37:27PM +0000, Mark Brown wrote: > > > On Wed, Mar 01, 2023 at 08:27:45AM -0400, Jason Gunthorpe wrote: > > > > On Wed, Mar 01, 2023 at 11:56:53AM +0000, Krishna Yarlagadda wrote: > > > > > > > > TPM device connected behind half duplex controller can only work > > > > > this way. So, no additional flag needed to check. > > > > > > > Just because a DT hooks it up this way doesn't mean the kernel driver > > > > can support it, eg support hasn't been implemented in an older SPI > > > > driver or something. > > > > > > > If the failure mode is anything other than the TPM doesn't probe we > > > > will need to check for support. > > > > > > It's not like these buses are hot pluggable - someone would have to > > > design and manufacture a board which doesn't work. It's probably > > > reasonable for this to fail with the SPI subsystem saying it can't > > > support things when the operation is tried. > > > > If the spi subsystem fails this request with these flags that would be > > great, it would cause the TPM to fail probing reliably. > > > > But does this patch do that? It looks like non-supporting half duplex > > drivers will just ignore the new flag? > > I think the assumption is that there are currently no half duplex > drivers that would be impacted by this. If I understand correctly, the > TPM driver currently supports only full duplex controllers, because > that's required in order to detect the wait state in software. > > So, yes, half duplex controllers would ignore this flag, but since they > couldn't have supported TPM flow control before anyway it doesn't make a > difference. If more HW uses this feature it will likely look a lot like these tegra drivers where an existing supported SPI driver gains a HW bit to do the flow. Meaning DTs will exist configuring a TPM to a half duplex SPI and kernels will exist that don't have the HW driver that implements it. So, I would like it if old kernels running against a new DT do not mis-operate the SPI because their SPI driver does not support TPM operation. Either because the spi layer refuses the request as unsupported or the TPM layer refuses to use the spi driver as unsupported. I do not like the idea that the SPI subsystem will take a request from a client driver and silently mis-execute it. Jason