Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 55B88C7EE32 for ; Wed, 1 Mar 2023 18:56:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229958AbjCAS4P (ORCPT ); Wed, 1 Mar 2023 13:56:15 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37876 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229674AbjCAS4M (ORCPT ); Wed, 1 Mar 2023 13:56:12 -0500 Received: from mail-pj1-x1030.google.com (mail-pj1-x1030.google.com [IPv6:2607:f8b0:4864:20::1030]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 62A284742E for ; Wed, 1 Mar 2023 10:56:10 -0800 (PST) Received: by mail-pj1-x1030.google.com with SMTP id q31-20020a17090a17a200b0023750b69614so223018pja.5 for ; Wed, 01 Mar 2023 10:56:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=in-reply-to:content-disposition:mime-version:references:message-id :subject:cc:to:from:date:from:to:cc:subject:date:message-id:reply-to; bh=vSpw3dBnLTxPr0uk82VR0oSTopLNz20E94PKNc5GO0Y=; b=xwDWh4lifKaYJBTVi81JzJhZtxh1zdsjUspmFsIpRjYq0udQv7ej0R61Pmbq1nvBcD 0zDQgM/VYseleci/rQBvIDeHntMXnywDpC5XDIXPUf93DCzndtyx3PIYVH0E8xxEWxMM 8kDYGJ8mXxV+JblEhorQhFmB0AxvqL04CmPXApMCW4typZ275jpFDB0HUPJA/+JidLOm qsckFvDDl3RDF8fQxEY/ojzRQHijpuAeFNNVtvUXmBghta5GH53IWr1f5gwJriYdBX5U TCm3k/9RtbgY34/kvWhkfYPqS/M5QLDQMHr7YfTXb3kCYxicXV5K1Ci0BF12+EVrzIFQ zFrQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=in-reply-to:content-disposition:mime-version:references:message-id :subject:cc:to:from:date:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=vSpw3dBnLTxPr0uk82VR0oSTopLNz20E94PKNc5GO0Y=; b=l5sOxhnjgOACnrcRr3zAD0aeOPzxUAyFi3Jl1/9lPzvAjMyecGdOqWjwJusQoj8Qbk sqe54dN2N/Z9lBjbjzV0L0Ovl3sfytF3TsmHW4Qdh6apZg+QXLShKOvXxbxi5iKkqn81 AQQmDY5htg17IVl+E2hyncM3Gsa7kMIVmUUke6oHlcjsK1bUwwRa1w5rU/z/qiuLKRsY t076rQSNOZcrxcC9Oirn5aQR8zvVi5iockd39lc3uX7s9CF7xV99zQRhVkD1R0nmdB/A mRiWPp5SnxP2273O9F9BVuN8H/HNb5nTo0oFru8ee4rUdrtBpvZu6xKkUWOloyMDTE56 MaHg== X-Gm-Message-State: AO0yUKXNic1Ml3auO2dA6ixCrWIDZj1tc9Z/LBbatQquMKPzRzgdl2UQ tc3iWu2hlpmvsg8ASLZ7YrVFbA== X-Google-Smtp-Source: AK7set+l+B1RWIWZcdT0G5HJVGUWcgXe4TE8oNiM8lSJ+x0hHcMvWRZVHLTy7swcJKxnuQvggcalGQ== X-Received: by 2002:a05:6a20:258b:b0:cc:868f:37b3 with SMTP id k11-20020a056a20258b00b000cc868f37b3mr6581409pzd.58.1677696969835; Wed, 01 Mar 2023 10:56:09 -0800 (PST) Received: from p14s ([2604:3d09:148c:c800:a1e5:28cc:d6dd:89d0]) by smtp.gmail.com with ESMTPSA id i71-20020a63874a000000b00502e7115cbdsm7795640pge.51.2023.03.01.10.56.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 01 Mar 2023 10:56:09 -0800 (PST) Date: Wed, 1 Mar 2023 11:56:06 -0700 From: Mathieu Poirier To: "Iuliana Prodan (OSS)" Cc: Bjorn Andersson , Shawn Guo , Sascha Hauer , "S.J. Wang" , Fabio Estevam , Daniel Baluta , Iuliana Prodan , linux-imx , linux-remoteproc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Pengutronix Kernel Team Subject: Re: [PATCH v5] remoteproc: imx_dsp_rproc: add custom memory copy implementation for i.MX DSP Cores Message-ID: <20230301185606.GB1326133@p14s> References: <20230221170356.27923-1-iuliana.prodan@oss.nxp.com> <20230301184916.GA1326133@p14s> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20230301184916.GA1326133@p14s> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Mar 01, 2023 at 11:49:16AM -0700, Mathieu Poirier wrote: > Hi Iuliana, > > On Tue, Feb 21, 2023 at 07:03:56PM +0200, Iuliana Prodan (OSS) wrote: > > From: Iuliana Prodan > > > > The IRAM is part of the HiFi DSP. > > According to hardware specification only 32-bits write are allowed > > otherwise we get a Kernel panic. > > > > Therefore add a custom memory copy and memset functions to deal with > > the above restriction. > > > > Signed-off-by: Iuliana Prodan > > --- > > Changes since v4 > > - use GENMASK; > > - s/ioread32/readl; > > - s/iowrite32/writel; > > - use for loop with writel instead of __iowrite32_copy; > > - update multi-line comment format. > > > > This looks good now. I will queue this on March 13th when 6.3-rc2 is out. > And out of curiosity, are the remote processors handled by imx_rproc.c also have the same 32-bit write constraints? If so, it would be nice to have a patch that fixes that as well. In such a case, imx_dsp_rproc_memcpy() and imx_dsp_rproc_memset() should be renamed to something more generic and re-used in imx_rproc.c. > Thanks, > Mathieu > > > Changes since v3 > > - remove Reported-by > > > > Changes since v2 > > - fix warning "cast from pointer to integer of different size" > > reported by kernel test robot. > > > > Changes since v1 > > - added missing check for cases when the memory slot is bigger than the file size; > > - added a custom memset function > > - removed is_iomem flag since is not used here > > - updated custom memcpy function to avoid reading after end of source > > --- > > drivers/remoteproc/imx_dsp_rproc.c | 187 ++++++++++++++++++++++++++++- > > 1 file changed, 186 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/remoteproc/imx_dsp_rproc.c b/drivers/remoteproc/imx_dsp_rproc.c > > index 81d3a01e1444..dcbb957bc7ac 100644 > > --- a/drivers/remoteproc/imx_dsp_rproc.c > > +++ b/drivers/remoteproc/imx_dsp_rproc.c > > @@ -739,6 +739,191 @@ static void imx_dsp_rproc_kick(struct rproc *rproc, int vqid) > > dev_err(dev, "%s: failed (%d, err:%d)\n", __func__, vqid, err); > > } > > > > +/* > > + * Custom memory copy implementation for i.MX DSP Cores > > + * > > + * The IRAM is part of the HiFi DSP. > > + * According to hw specs only 32-bits writes are allowed. > > + */ > > +static int imx_dsp_rproc_memcpy(void *dest, const void *src, size_t size) > > +{ > > + const u8 *src_byte = src; > > + const u32 *source = src; > > + u32 affected_mask; > > + u32 *dst = dest; > > + int i, q, r; > > + u32 tmp; > > + > > + /* destination must be 32bit aligned */ > > + if (!IS_ALIGNED((uintptr_t)dest, 4)) > > + return -EINVAL; > > + > > + q = size / 4; > > + r = size % 4; > > + > > + /* copy data in units of 32 bits at a time */ > > + for (i = 0; i < q; i++) > > + writel(source[i], &dst[i]); > > + > > + if (r) { > > + affected_mask = GENMASK(8 * r, 0); > > + > > + /* > > + * first read the 32bit data of dest, then change affected > > + * bytes, and write back to dest. > > + * For unaffected bytes, it should not be changed > > + */ > > + tmp = readl(dest + q * 4); > > + tmp &= ~affected_mask; > > + > > + /* avoid reading after end of source */ > > + for (i = 0; i < r; i++) > > + tmp |= (src_byte[q * 4 + i] << (8 * i)); > > + > > + writel(tmp, dest + q * 4); > > + } > > + > > + return 0; > > +} > > + > > +/* > > + * Custom memset implementation for i.MX DSP Cores > > + * > > + * The IRAM is part of the HiFi DSP. > > + * According to hw specs only 32-bits writes are allowed. > > + */ > > +static int imx_dsp_rproc_memset(void *addr, u8 value, size_t size) > > +{ > > + u32 tmp_val = value; > > + u32 *tmp_dst = addr; > > + u32 affected_mask; > > + int q, r; > > + u32 tmp; > > + > > + /* destination must be 32bit aligned */ > > + if (!IS_ALIGNED((uintptr_t)addr, 4)) > > + return -EINVAL; > > + > > + tmp_val |= tmp_val << 8; > > + tmp_val |= tmp_val << 16; > > + > > + q = size / 4; > > + r = size % 4; > > + > > + while (q--) > > + writel(tmp_val, tmp_dst++); > > + > > + if (r) { > > + affected_mask = GENMASK(8 * r, 0); > > + > > + /* > > + * first read the 32bit data of addr, then change affected > > + * bytes, and write back to addr. > > + * For unaffected bytes, it should not be changed > > + */ > > + tmp = readl(tmp_dst); > > + tmp &= ~affected_mask; > > + > > + tmp |= (tmp_val & affected_mask); > > + writel(tmp, tmp_dst); > > + } > > + > > + return 0; > > +} > > + > > +/** > > + * imx_dsp_rproc_elf_load_segments() - load firmware segments to memory > > + * @rproc: remote processor which will be booted using these fw segments > > + * @fw: the ELF firmware image > > + * > > + * This function loads the firmware segments to memory, where the remote > > + * processor expects them. > > + * > > + * Return: 0 on success and an appropriate error code otherwise > > + */ > > +static int imx_dsp_rproc_elf_load_segments(struct rproc *rproc, const struct firmware *fw) > > +{ > > + struct device *dev = &rproc->dev; > > + const void *ehdr, *phdr; > > + int i, ret = 0; > > + u16 phnum; > > + const u8 *elf_data = fw->data; > > + u8 class = fw_elf_get_class(fw); > > + u32 elf_phdr_get_size = elf_size_of_phdr(class); > > + > > + ehdr = elf_data; > > + phnum = elf_hdr_get_e_phnum(class, ehdr); > > + phdr = elf_data + elf_hdr_get_e_phoff(class, ehdr); > > + > > + /* go through the available ELF segments */ > > + for (i = 0; i < phnum; i++, phdr += elf_phdr_get_size) { > > + u64 da = elf_phdr_get_p_paddr(class, phdr); > > + u64 memsz = elf_phdr_get_p_memsz(class, phdr); > > + u64 filesz = elf_phdr_get_p_filesz(class, phdr); > > + u64 offset = elf_phdr_get_p_offset(class, phdr); > > + u32 type = elf_phdr_get_p_type(class, phdr); > > + void *ptr; > > + > > + if (type != PT_LOAD || !memsz) > > + continue; > > + > > + dev_dbg(dev, "phdr: type %d da 0x%llx memsz 0x%llx filesz 0x%llx\n", > > + type, da, memsz, filesz); > > + > > + if (filesz > memsz) { > > + dev_err(dev, "bad phdr filesz 0x%llx memsz 0x%llx\n", > > + filesz, memsz); > > + ret = -EINVAL; > > + break; > > + } > > + > > + if (offset + filesz > fw->size) { > > + dev_err(dev, "truncated fw: need 0x%llx avail 0x%zx\n", > > + offset + filesz, fw->size); > > + ret = -EINVAL; > > + break; > > + } > > + > > + if (!rproc_u64_fit_in_size_t(memsz)) { > > + dev_err(dev, "size (%llx) does not fit in size_t type\n", > > + memsz); > > + ret = -EOVERFLOW; > > + break; > > + } > > + > > + /* grab the kernel address for this device address */ > > + ptr = rproc_da_to_va(rproc, da, memsz, NULL); > > + if (!ptr) { > > + dev_err(dev, "bad phdr da 0x%llx mem 0x%llx\n", da, > > + memsz); > > + ret = -EINVAL; > > + break; > > + } > > + > > + /* put the segment where the remote processor expects it */ > > + if (filesz) { > > + ret = imx_dsp_rproc_memcpy(ptr, elf_data + offset, filesz); > > + if (ret) { > > + dev_err(dev, "memory copy failed for da 0x%llx memsz 0x%llx\n", > > + da, memsz); > > + break; > > + } > > + } > > + > > + /* zero out remaining memory for this segment */ > > + if (memsz > filesz) { > > + ret = imx_dsp_rproc_memset(ptr + filesz, 0, memsz - filesz); > > + if (ret) { > > + dev_err(dev, "memset failed for da 0x%llx memsz 0x%llx\n", > > + da, memsz); > > + break; > > + } > > + } > > + } > > + > > + return ret; > > +} > > + > > static int imx_dsp_rproc_parse_fw(struct rproc *rproc, const struct firmware *fw) > > { > > if (rproc_elf_load_rsc_table(rproc, fw)) > > @@ -753,7 +938,7 @@ static const struct rproc_ops imx_dsp_rproc_ops = { > > .start = imx_dsp_rproc_start, > > .stop = imx_dsp_rproc_stop, > > .kick = imx_dsp_rproc_kick, > > - .load = rproc_elf_load_segments, > > + .load = imx_dsp_rproc_elf_load_segments, > > .parse_fw = imx_dsp_rproc_parse_fw, > > .sanity_check = rproc_elf_sanity_check, > > .get_boot_addr = rproc_elf_get_boot_addr, > > -- > > 2.17.1 > >