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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?EeryyZM4FOeVrO02bMW0NPubwNDrNWW8c8o5mTuhpYG25HQ0wEOb8POi/Fy/?= =?us-ascii?Q?zc3ayeBTOpTw6oH2CloAVu8QclTf/QfXtFlcntWw4oIEjE3LOQjOPY4OM/Qp?= =?us-ascii?Q?b8U8Cvhs2wd2lS+pWQeIdjlihQf5PMf4/1TvxmWUVkEprmxFvQw7T2T8lCJB?= =?us-ascii?Q?8KlrEj5OJjH2yUgEj551V524zjcIyFcuodTpg3zWwHkzc2Ye1RtP27jbVvuT?= =?us-ascii?Q?PRNi4Vr+KsI1qsZkxA/2K3+Bq0AiJvGfuB6bdq6R1wCch3bKBDY8EaK3We3J?= =?us-ascii?Q?o1mLsVuengPbyF4hG/gM6O6fl+Zm1tkEAKO+a5ZAsOLoddhK8OAlDvP5QPs3?= =?us-ascii?Q?Jnugvf/XMrzYdA/5K6X7/mJfJF4bRPtHP0FF8YEvr70PbvCvl0Rjfl762JCm?= =?us-ascii?Q?13bcZSgIw7uisbBGk2RB8HvgAVXv6Wl1LJ6GEkH6CPFfvRL5i0ZF6LonFbmU?= =?us-ascii?Q?x4dsssDlOQruzwVMpCc9Dn46PjOlOgtd/408Wey5osXHgx1nY3O54Ny0xiN1?= =?us-ascii?Q?++e5ls1ooMrlNYvSy/UGNVlnx/xbayAh8kIUZ0fePrNDLRBL1gWwTxeJ7L0X?= =?us-ascii?Q?aiQOLjh9jfNuApnAxELJP/Uk1qF/fMcE2of1kG+NDLvrxSQJaBY9HdCH8Lay?= =?us-ascii?Q?+ldsKB8Mzb+5D9rkl1+GA9Ou5bWLxUNNoS/SHPyLz74Qi4rrC/MH4OotaJRq?= =?us-ascii?Q?1Q8n+1QIzgoZlj6pA46IBEMimhxqdZBmdfOIx8AKz9AOsy2WA43Sft9if1iy?= =?us-ascii?Q?Ms4457kyuCEDtaWe4aYc4CWFgCjEvigR0VdN8gamnGMVhjHWqd0tX/8UMc1+?= =?us-ascii?Q?zECZoqA8VmfSq9ME5a6ioVCn8uJe4bp2z89P5km8/qIZw9YPMmyfMGNQWzFD?= =?us-ascii?Q?RGnV1XAr2/AdZ90y0/rYCzMfPBsZivNpRlYIP0UnVNjH/uxNTkSsJ5J2uUtK?= =?us-ascii?Q?lhvJ70i+6ecJTv3LOmkzGvYeQdXHiTwisjnNKQiqhy6i31Vg29cnjBNF++jG?= =?us-ascii?Q?eWvZxkHP+TxscRZQw4y7efNJbMzOx6p2yougbmNTO3cgHqfr8xaseBV0jIUC?= =?us-ascii?Q?3zU+dISOQKIhDuQrXgodhFyE6JDZ+7Bu8Y/Ppb+3XpXC54r5sTHltobi8CkT?= =?us-ascii?Q?jR76FaY/S1TETowYiwVX33jrJuS6fiwtSJhOxYY5CNUlTTE6HFI5MqUzjRqK?= =?us-ascii?Q?nsV66P2B3cUF3+c+dZ+Yr96bCQuJ3RaIJOz9CLuuU/LJ10WTMOgruWfr+3Pa?= =?us-ascii?Q?VaYB4OKfNakP27t8Xy7kmvYtCjN8mVAjHQmoZ6LLictXYct5DC6xZBtpOG89?= =?us-ascii?Q?qGaPqoA609mXSdX5jeds66z7GosbR6kp9MHwQeyyLv7BppPLDwo/DAUK+6Xy?= =?us-ascii?Q?slCDkJZlsigqtmZJNag4PHg9pHzVbZ2yhQaTjNC2w6pOmv2yWxNWmnlLvafO?= =?us-ascii?Q?4ACYva4PjjTzWntIQp8hTOORaYB86fyuLksAVrnLW+GVivuE+mm7PS7GOtYz?= =?us-ascii?Q?wVOI9Aclvj2iGCjO5JKALV+KLubXeaoak6epVLZYLB6hDb4A1ZzGyXV556Is?= =?us-ascii?Q?xMRMWZobK8/KrARdvNQDN1t40t8XawamvSE72oTQHaxBMXZtfp/IfAtVADW0?= =?us-ascii?Q?Og=3D=3D?= X-MS-Exchange-CrossTenant-Network-Message-Id: 2d18d276-ab59-4eb0-4525-08db1b965be8 X-MS-Exchange-CrossTenant-AuthSource: MN0PR11MB6059.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Mar 2023 03:21:20.8580 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: yFqqQh0/V5ALCslhNRKGS4PDn2sNzMRGwumB/0ag778fatcMPMDmdOn9crqN/oDa4NpW7Rn6sYMPdDu4JoenYg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR11MB4600 X-OriginatorOrg: intel.com Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Mar 02, 2023 at 03:53:37PM -0800, Rob Clark wrote: > From: Rob Clark > missing some wording here... > v2: rebase > > Signed-off-by: Rob Clark > --- > drivers/gpu/drm/i915/i915_request.c | 20 ++++++++++++++++++++ > 1 file changed, 20 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_request.c b/drivers/gpu/drm/i915/i915_request.c > index 7503dcb9043b..44491e7e214c 100644 > --- a/drivers/gpu/drm/i915/i915_request.c > +++ b/drivers/gpu/drm/i915/i915_request.c > @@ -97,6 +97,25 @@ static bool i915_fence_enable_signaling(struct dma_fence *fence) > return i915_request_enable_breadcrumb(to_request(fence)); > } > > +static void i915_fence_set_deadline(struct dma_fence *fence, ktime_t deadline) > +{ > + struct i915_request *rq = to_request(fence); > + > + if (i915_request_completed(rq)) > + return; > + > + if (i915_request_started(rq)) > + return; why do we skip the boost if already started? don't we want to boost the freq anyway? > + > + /* > + * TODO something more clever for deadlines that are in the > + * future. I think probably track the nearest deadline in > + * rq->timeline and set timer to trigger boost accordingly? > + */ I'm afraid it will be very hard to find some heuristics of what's late enough for the boost no? I mean, how early to boost the freq on an upcoming deadline for the timer? > + > + intel_rps_boost(rq); > +} > + > static signed long i915_fence_wait(struct dma_fence *fence, > bool interruptible, > signed long timeout) > @@ -182,6 +201,7 @@ const struct dma_fence_ops i915_fence_ops = { > .signaled = i915_fence_signaled, > .wait = i915_fence_wait, > .release = i915_fence_release, > + .set_deadline = i915_fence_set_deadline, > }; > > static void irq_execute_cb(struct irq_work *wrk) > -- > 2.39.1 >