Date:   Fri, 3 Mar 2023 10:43:37 +0000
From:   Lee Jones <lee@kernel.org>
To:     Aidan MacDonald <aidanmacdonald.0x0@gmail.com>
Cc:     agross@kernel.org, andersson@kernel.org, konrad.dybcio@linaro.org,
        linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v1 1/4] mfd: qcom-pm8008: Fix swapped mask/unmask in irq
 chip
Message-ID: <20230303104337.GS2303077@google.com>
References: <20230216222214.138671-1-aidanmacdonald.0x0@gmail.com>
 <20230216222214.138671-2-aidanmacdonald.0x0@gmail.com>
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On Thu, 16 Feb 2023, Aidan MacDonald wrote:

> The usual behavior of mask registers is writing a '1' bit to
> disable (mask) an interrupt; similarly, writing a '1' bit to
> an unmask register enables (unmasks) an interrupt.
> 
> Due to a longstanding issue in regmap-irq, mask and unmask
> registers were inverted when both kinds of registers were
> present on the same chip, ie. regmap-irq actually wrote '1's
> to the mask register to enable an IRQ and '1's to the unmask
> register to disable an IRQ.
> 
> This was fixed by commit e8ffb12e7f06 ("regmap-irq: Fix
> inverted handling of unmask registers") but the fix is opt-in
> via mask_unmask_non_inverted = true because it requires manual
> changes for each affected driver. The new behavior will become
> the default once all drivers have been updated.
> 
> The PM8008 appears to rely on the inverted behavior. It has
> separate set & clear registers for a register called INT_EN,
> which presumably enables interrupts by writing '1's. Opt in
> to the new non-inverted behavior & swap mask_base/unmask_base.
> 
> Signed-off-by: Aidan MacDonald <aidanmacdonald.0x0@gmail.com>
> ---
>  drivers/mfd/qcom-pm8008.c | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)

Applied, thanks

-- 
Lee Jones [李琼斯]