Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DF35FC7EE2F for ; Fri, 3 Mar 2023 15:52:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231514AbjCCPwM (ORCPT ); Fri, 3 Mar 2023 10:52:12 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36870 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230140AbjCCPwK (ORCPT ); Fri, 3 Mar 2023 10:52:10 -0500 Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C15F6EFBA for ; Fri, 3 Mar 2023 07:52:08 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1677858728; x=1709394728; h=date:from:to:cc:subject:message-id:references: mime-version:content-transfer-encoding:in-reply-to; bh=lsRjo7yTXyKCofFwzcN0jbA0ArTfH/fumplb/rfEDjk=; b=d8JDpKdzfQkFLHouzaqxLRot9sroMjcM95SIE1kq+o02cTRQ/JObU9fJ 6D2M9VsrWdAPLY+IXbEJ9xTlD32hn83OnZMBcUbOWjZzDv4pQdzX65Z1O MatLcl7QoJ9sKsUBeP+Gqv6ZLoBNi3qpjyuQrYCM0+UqlMkH5yRbN3lSj SslPDKIMy/Yb+XMQRc/dkWHZp2H/aEqkvqzYLe7BnmPQKsT+HtOGnlgDU OaWxtVY2yXBs78AnIQ6FcmEITC62Ei9bYHFPHmYz6LPD+IEmO5IDrMpgt mISRjP+Ujz3nH3AvlPAfKeklF/7P0jP/4uZUK3AdJEcmL8PFQJtnb0EnX Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10638"; a="318896434" X-IronPort-AV: E=Sophos;i="5.98,231,1673942400"; d="scan'208";a="318896434" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Mar 2023 07:52:08 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10638"; a="818509745" X-IronPort-AV: E=Sophos;i="5.98,231,1673942400"; d="scan'208";a="818509745" Received: from stinkpipe.fi.intel.com (HELO stinkbox) ([10.237.72.70]) by fmsmga001.fm.intel.com with SMTP; 03 Mar 2023 07:52:03 -0800 Received: by stinkbox (sSMTP sendmail emulation); Fri, 03 Mar 2023 17:52:02 +0200 Date: Fri, 3 Mar 2023 17:52:02 +0200 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= To: Rob Clark Cc: dri-devel@lists.freedesktop.org, Rob Clark , Thomas Zimmermann , Tvrtko Ursulin , Christian =?iso-8859-1?Q?K=F6nig?= , Michel =?iso-8859-1?Q?D=E4nzer?= , open list , Daniel Vetter , Pekka Paalanen , Luben Tuikov , Rodrigo Vivi , Alex Deucher , freedreno@lists.freedesktop.org Subject: Re: [PATCH v9 11/15] drm/atomic-helper: Set fence deadline for vblank Message-ID: References: <20230302235356.3148279-1-robdclark@gmail.com> <20230302235356.3148279-12-robdclark@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: X-Patchwork-Hint: comment Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Mar 03, 2023 at 07:45:05AM -0800, Rob Clark wrote: > On Fri, Mar 3, 2023 at 7:12 AM Ville Syrj?l? > wrote: > > > > On Thu, Mar 02, 2023 at 03:53:33PM -0800, Rob Clark wrote: > > > From: Rob Clark > > > > > > For an atomic commit updating a single CRTC (ie. a pageflip) calculate > > > the next vblank time, and inform the fence(s) of that deadline. > > > > > > v2: Comment typo fix (danvet) > > > > > > Signed-off-by: Rob Clark > > > Reviewed-by: Daniel Vetter > > > Signed-off-by: Rob Clark > > > --- > > > drivers/gpu/drm/drm_atomic_helper.c | 36 +++++++++++++++++++++++++++++ > > > 1 file changed, 36 insertions(+) > > > > > > diff --git a/drivers/gpu/drm/drm_atomic_helper.c b/drivers/gpu/drm/drm_atomic_helper.c > > > index d579fd8f7cb8..d8ee98ce2fc5 100644 > > > --- a/drivers/gpu/drm/drm_atomic_helper.c > > > +++ b/drivers/gpu/drm/drm_atomic_helper.c > > > @@ -1511,6 +1511,40 @@ void drm_atomic_helper_commit_modeset_enables(struct drm_device *dev, > > > } > > > EXPORT_SYMBOL(drm_atomic_helper_commit_modeset_enables); > > > > > > +/* > > > + * For atomic updates which touch just a single CRTC, calculate the time of the > > > + * next vblank, and inform all the fences of the deadline. > > > + */ > > > +static void set_fence_deadline(struct drm_device *dev, > > > + struct drm_atomic_state *state) > > > +{ > > > + struct drm_crtc *crtc, *wait_crtc = NULL; > > > + struct drm_crtc_state *new_crtc_state; > > > + struct drm_plane *plane; > > > + struct drm_plane_state *new_plane_state; > > > + ktime_t vbltime; > > > + int i; > > > + > > > + for_each_new_crtc_in_state (state, crtc, new_crtc_state, i) { > > > + if (wait_crtc) > > > + return; > > > + wait_crtc = crtc; > > > + } > > > + > > > + /* If no CRTCs updated, then nothing to do: */ > > > + if (!wait_crtc) > > > + return; > > > > Is there an actual point in limiting this to single crtc updates? > > That immediately excludes tiled displays/etc. > > > > Handling an arbitrary number of crtcs shouldn't really be a lot > > more complicated should it? > > I guess I could find the soonest upcoming vblank of all the CRTCs and > use that as the deadline? Yeah, that seems reasonable. The flips are supposed to happen atomically (if possible) anyway so collapsing the thing to a single deadline for all makes sense to me. -- Ville Syrj?l? Intel