Date:   Fri, 03 Mar 2023 17:16:58 +0200
From:   Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
To:     Manivannan Sadhasivam <mani@kernel.org>,
        Devi Priya <quic_devipriy@quicinc.com>
CC:     agross@kernel.org, andersson@kernel.org, konrad.dybcio@linaro.org,
        lpieralisi@kernel.org, kw@linux.com, robh@kernel.org,
        bhelgaas@google.com, krzysztof.kozlowski+dt@linaro.org,
        vkoul@kernel.org, kishon@kernel.org, mturquette@baylibre.com,
        sboyd@kernel.org, p.zabel@pengutronix.de, svarbanov@mm-sol.com,
        linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org,
        devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
        linux-phy@lists.infradead.org, linux-clk@vger.kernel.org,
        quic_srichara@quicinc.com, quic_gokulsri@quicinc.com,
        quic_sjaganat@quicinc.com, quic_kathirav@quicinc.com,
        quic_arajkuma@quicinc.com, quic_anusha@quicinc.com
Subject: =?US-ASCII?Q?Re=3A_=5BPATCH_1/7=5D_dt-bindings=3A_PCI=3A_q?= =?US-ASCII?Q?com=3A_Add_IPQ9574_specific_compatible?=
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28 =D1=84=D0=B5=D0=B2=D1=80=D0=B0=D0=BB=D1=8F 2023 =D0=B3=2E 08:33:58 GMT+0=
2:00, Manivannan Sadhasivam <mani@kernel=2Eorg> =D0=BF=D0=B8=D1=88=D0=B5=D1=
=82:
>On Tue, Feb 28, 2023 at 10:56:53AM +0530, Devi Priya wrote:
>>=20
>>=20
>> On 2/24/2023 1:53 PM, Manivannan Sadhasivam wrote:
>> > On Tue, Feb 14, 2023 at 10:11:29PM +0530, Devi Priya wrote:
>> > > Document the compatible for IPQ9574
>> > >=20
>> Hi Mani, Thanks for taking time to review the patch=2E
>> >=20
>> > You didn't mention about the "msi-parent" property that is being adde=
d
>> > by this patch
>> Sure, will update the commit message in the next spin
>> >=20
>> > > Signed-off-by: Devi Priya <quic_devipriy@quicinc=2Ecom>
>> > > ---
>> > >   =2E=2E=2E/devicetree/bindings/pci/qcom,pcie=2Eyaml    | 72 ++++++=
++++++++++++-
>> > >   1 file changed, 70 insertions(+), 2 deletions(-)
>> > >=20
>> > > diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie=2Eyaml=
 b/Documentation/devicetree/bindings/pci/qcom,pcie=2Eyaml
>> > > index 872817d6d2bd=2E=2Edabdf2684e2d 100644
>> > > --- a/Documentation/devicetree/bindings/pci/qcom,pcie=2Eyaml
>> > > +++ b/Documentation/devicetree/bindings/pci/qcom,pcie=2Eyaml
>> > > @@ -26,6 +26,7 @@ properties:
>> > >             - qcom,pcie-ipq8064-v2
>> > >             - qcom,pcie-ipq8074
>> > >             - qcom,pcie-ipq8074-gen3
>> > > +          - qcom,pcie-ipq9574
>> > >             - qcom,pcie-msm8996
>> > >             - qcom,pcie-qcs404
>> > >             - qcom,pcie-sa8540p
>> > > @@ -44,11 +45,11 @@ properties:
>> > >     reg:
>> > >       minItems: 4
>> > > -    maxItems: 5
>> > > +    maxItems: 6
>> > >     reg-names:
>> > >       minItems: 4
>> > > -    maxItems: 5
>> > > +    maxItems: 6
>> > >     interrupts:
>> > >       minItems: 1
>> > > @@ -105,6 +106,8 @@ properties:
>> > >       items:
>> > >         - const: pciephy
>> > > +  msi-parent: true
>> > > +
>> > >     power-domains:
>> > >       maxItems: 1
>> > > @@ -173,6 +176,27 @@ allOf:
>> > >               - const: parf # Qualcomm specific registers
>> > >               - const: config # PCIe configuration space
>> > > +  - if:
>> > > +      properties:
>> > > +        compatible:
>> > > +          contains:
>> > > +            enum:
>> > > +              - qcom,pcie-ipq9574
>> > > +    then:
>> > > +      properties:
>> > > +        reg:
>> > > +          minItems: 5
>> > > +          maxItems: 6
>> > > +        reg-names:
>> > > +          minItems: 5
>> > > +          items:
>> > > +            - const: dbi # DesignWare PCIe registers
>> > > +            - const: elbi # External local bus interface registers
>> > > +            - const: atu # ATU address space
>> > > +            - const: parf # Qualcomm specific registers
>> > > +            - const: config # PCIe configuration space
>> > > +            - const: aggr_noc #PCIe aggr_noc
>> >=20
>> > Why do you need this region unlike other SoCs? Is the driver making u=
se of it?
>> We have the aggr_noc region in ipq9574 to achieve higher throughput & t=
o
>> handle multiple PCIe instances=2E The driver uses it to rate adapt 1-la=
ne PCIe
>> clocks=2E My bad, missed it=2E Will add the driver changes in V2=2E
>
>Hmm, this is something new=2E How can you achieve higher throughput with =
this
>region? Can you explain more on how it is used?

Based on the name of the region, it looks like it is an interconnect regio=
n=2E=20

Devi, if this is the case, then you have to handle it through the intercon=
nect driver, rather than poking directly into these registers=2E


>
>Thanks,
>Mani
>
>> >=20
>> > Thanks,
>> > Mani
>> >=20
>> > > +
>> > >     - if:
>> > >         properties:
>> > >           compatible:
>> > > @@ -365,6 +389,39 @@ allOf:
>> > >               - const: ahb # AHB Reset
>> > >               - const: axi_m_sticky # AXI Master Sticky reset
>> > > +  - if:
>> > > +      properties:
>> > > +        compatible:
>> > > +          contains:
>> > > +            enum:
>> > > +              - qcom,pcie-ipq9574
>> > > +    then:
>> > > +      properties:
>> > > +        clocks:
>> > > +          minItems: 6
>> > > +          maxItems: 6
>> > > +        clock-names:
>> > > +          items:
>> > > +            - const: ahb  # AHB clock
>> > > +            - const: aux  # Auxiliary clock
>> > > +            - const: axi_m # AXI Master clock
>> > > +            - const: axi_s # AXI Slave clock
>> > > +            - const: axi_bridge # AXI bridge clock
>> > > +            - const: rchng
>> > > +        resets:
>> > > +          minItems: 8
>> > > +          maxItems: 8
>> > > +        reset-names:
>> > > +          items:
>> > > +            - const: pipe # PIPE reset
>> > > +            - const: sticky # Core Sticky reset
>> > > +            - const: axi_s_sticky # AXI Slave Sticky reset
>> > > +            - const: axi_s # AXI Slave reset
>> > > +            - const: axi_m_sticky # AXI Master Sticky reset
>> > > +            - const: axi_m # AXI Master reset
>> > > +            - const: aux # AUX Reset
>> > > +            - const: ahb # AHB Reset
>> > > +
>> > >     - if:
>> > >         properties:
>> > >           compatible:
>> > > @@ -681,6 +738,16 @@ allOf:
>> > >           - interconnects
>> > >           - interconnect-names
>> > > +  - if:
>> > > +      properties:
>> > > +        compatible:
>> > > +          contains:
>> > > +            enum:
>> > > +              - qcom,pcie-ipq9574
>> > > +    then:
>> > > +      required:
>> > > +        - msi-parent
>> > > +
>> > >     - if:
>> > >         not:
>> > >           properties:
>> > > @@ -693,6 +760,7 @@ allOf:
>> > >                   - qcom,pcie-ipq8064v2
>> > >                   - qcom,pcie-ipq8074
>> > >                   - qcom,pcie-ipq8074-gen3
>> > > +                - qcom,pcie-ipq9574
>> > >                   - qcom,pcie-qcs404
>> > >       then:
>> > >         required:
>> > > --=20
>> > > 2=2E17=2E1
>> > >=20
>> >=20
>> Thanks,
>> Devi Priya
>