Subject: Re: [PATCH]PCI:disable resource decode in PCI BAR detection
From: Shaohua Li <shaohua.li@intel.com>
To: Matthew Wilcox <matthew@wil.cx>
Cc: lkml <linux-kernel@vger.kernel.org>,
       linux-pci <linux-pci@atrey.karlin.mff.cuni.cz>,
       Andrew Morton <akpm@linux-foundation.org>, Greg KH <gregkh@suse.de>
In-Reply-To: <20070913073140.GA17367@parisc-linux.org>
References: <1189664467.17835.1.camel@sli10-conroe.sh.intel.com>
	 <20070913073140.GA17367@parisc-linux.org>
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Date: Thu, 13 Sep 2007 15:24:46 +0800
Message-Id: <1189668286.18361.3.camel@sli10-conroe.sh.intel.com>
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On Thu, 2007-09-13 at 01:31 -0600, Matthew Wilcox wrote:
> On Thu, Sep 13, 2007 at 02:21:07PM +0800, Shaohua Li wrote:
> > http://bugzilla.kernel.org/show_bug.cgi?id=8833
> > We write 0xffffffff to BARs to detect BAR size, this will change BAR
> > base to 0xfxxxxxx depends on BAR size. In the bug, PCI MCFG base address
> > is 0xf4000000. One PCI device (gfx) has a 256M BAR, the detection code
> > will temprarily change it to 0xf0000000, so conflict with MCFG decode
> > range. Later memory based config space read/write address is decoded by
> > both MCH and gfx and cause a hang. This patch disables resource decode
> > in BAR size detection to avoid resource conflict. 
> 
> You missed the part where we have to avoid doing this for host bridges ...
> 
> http://marc.info/?l=linux-kernel&m=118809338631160&w=2
> 
> (I believe it's now queued in Greg's tree, and possibly Andrew's tree
> too)
Hmm, I don't know there is already a fix for this, so waste a whole
morning :(. yes, your patch looks better.

Thanks,
Shaohua
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