Date:   Mon, 6 Mar 2023 11:22:03 +0100
From:   Tommaso Merciai <tomm.merciai@gmail.com>
To:     Hal Feng <hal.feng@starfivetech.com>
Cc:     linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
        linux-riscv@lists.infradead.org, Stephen Boyd <sboyd@kernel.org>,
        Michael Turquette <mturquette@baylibre.com>,
        Philipp Zabel <p.zabel@pengutronix.de>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Conor Dooley <conor@kernel.org>,
        Palmer Dabbelt <palmer@dabbelt.com>,
        Paul Walmsley <paul.walmsley@sifive.com>,
        Albert Ou <aou@eecs.berkeley.edu>,
        Ben Dooks <ben.dooks@sifive.com>,
        Daniel Lezcano <daniel.lezcano@linaro.org>,
        Thomas Gleixner <tglx@linutronix.de>,
        Marc Zyngier <maz@kernel.org>,
        Emil Renner Berthing <emil.renner.berthing@canonical.com>,
        linux-kernel@vger.kernel.org
Subject: Re: [PATCH v4 00/19] Basic clock, reset & device tree support for
 StarFive JH7110 RISC-V SoC
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Hi Hal,

On Mon, Mar 06, 2023 at 11:29:48AM +0800, Hal Feng wrote:
> On Fri, 3 Mar 2023 20:08:20 +0100, Tommaso Merciai wrote:
> > Hello Hal,
> > I start to play with jh7110-starfive-visionfive-2-v1.3b I have collect
> > your series [3]. Now I'm trying to boot the image with the following
> > cmds:
> > 
> > setenv bootfile vmlinuz;
> > setenv fileaddr a0000000;
> > setenv fdtcontroladdr 0xffffffffffffffff;
> > setenv ipaddr 10.0.0.100;
> > setenv serverip 10.0.0.1;
> > setenv kernel_comp_addr_r 0xb0000000;
> > setenv kernel_comp_size 0x10000000;
> > tftpboot ${fdt_addr_r} jh7110-starfive-visionfive-2-v1.3b.dtb;
> > tftpboot ${kernel_addr_r} Image.gz;
> > run chipa_set_linux;
> > booti ${kernel_addr_r} - ${fdt_addr_r}
> > 
> > 
> > This the result:
> > 
> > Bytes transferred = 109443584 (685fa00 hex)
> > StarFive # run chipa_set_linux;
> > StarFive # printenv file
> >   fileaddr filesize
> > StarFive # printenv filesize
> > filesize=685fa00
> > StarFive # booti ${kernel_addr_r} - ${fdt_addr_r}
> >    Uncompressing Kernel Image
> > ## Flattened Device Tree blob at 46000000
> >    Booting using the fdt blob at 0x46000000
> >    Using Device Tree in place at 0000000046000000, end 0000000046005c14
> > 
> > Starting kernel ...
> > 
> > clk u5_dw_i2c_clk_core already disabled
> > clk u5_dw_i2c_clk_apb already disabled
> > 
> > ---------------------------------------------
> > 
> > I'm missing something? Any hints?
> > Many thanks in advance! :)
> 
> You can try the instructions at the link [1]. The branch [1] is
> based on v2 of this series, so you need to change the dtb name
> to "jh7110-starfive-visionfive-2-v1.3b.dtb" when using tftpboot.
> I will send v5 and update it to [1] this week.
> 
> [1] https://github.com/starfive-tech/linux/tree/JH7110_VisionFive2_upstream

Thanks for your help!
Collecting your latest 26 patches from [1] I'm able to boot the board
using cmds suggested in your link [2].

In particular I pick the following patches from your repo:

11934a315b67 (HEAD -> visionfive2-minimal, tag: visionfive2-minimal-v4, origin/visionfive2-minimal) riscv: dts: starfive: Add StarFive JH7110 VisionFive 2 board device tree
c246291ed2d0 riscv: dts: starfive: Add StarFive JH7110 pin function definitions
53c360e87ee8 riscv: dts: starfive: Add initial StarFive JH7110 device tree
e769528b7cd8 dt-bindings: riscv: Add SiFive S7 compatible
1f4c7408d02a soc: sifive: ccache: Add StarFive JH7110 support
cd1a430b56db dt-bindings: sifive,ccache0: Support StarFive JH7110 SoC
96fcf2e390d3 dt-bindings: interrupt-controller: Add StarFive JH7110 plic
542c43452e08 dt-bindings: timer: Add StarFive JH7110 clint
2b1bb27b0cff dt-bindings: riscv: Add StarFive JH7110 SoC and VisionFive 2 board
328cac9205d2 pinctrl: starfive: Add StarFive JH7110 aon controller driver
dd082f89c4fb pinctrl: starfive: Add StarFive JH7110 sys controller driver
aabf6ba76b81 dt-bindings: pinctrl: Add StarFive JH7110 aon pinctrl
f2c5025c54f9 dt-bindings: pinctrl: Add StarFive JH7110 sys pinctrl
7601624bdde0 reset: starfive: Add StarFive JH7110 reset driver
b1a2db0b97f4 clk: starfive: Add StarFive JH7110 always-on clock driver
0b2aaa26d5c8 clk: starfive: Add StarFive JH7110 system clock driver
2959b29a7d80 dt-bindings: clock: Add StarFive JH7110 always-on clock and reset generator
cfb65ad0957a dt-bindings: clock: Add StarFive JH7110 system clock and reset generator
f9df80901f49 reset: starfive: jh71x0: Use 32bit I/O on 32bit registers
c9400fc69d3a reset: starfive: Rename "jh7100" to "jh71x0" for the common code
8f05fdea85cd reset: starfive: Extract the common JH71X0 reset code
28f5efaa3b06 reset: starfive: Factor out common JH71X0 reset code
aa82ce33f593 reset: Create subdirectory for StarFive drivers
fb87b93f6aa8 clk: starfive: Rename "jh7100" to "jh71x0" for the common code
d73e36277d5f clk: starfive: Rename clk-starfive-jh7100.h to clk-starfive-jh71x0.h
04611bf6db16 clk: starfive: Factor out common JH7100 and JH7110 code

Hope this can help other peoples that start to play with
jh7110-starfive-visionfive-2-v1.3b :)
Thanks for your work!

Regards,
Tommaso

[1] https://github.com/hal-feng/linux/commits/visionfive2-minimal
[2] https://github.com/starfive-tech/linux/tree/JH7110_VisionFive2_upstream

> 
> Best regards,
> Hal