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[83.9.32.99]) by smtp.gmail.com with ESMTPSA id b14-20020a056512218e00b004dc4b00a1eesm1582671lft.261.2023.03.06.02.41.54 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 06 Mar 2023 02:41:55 -0800 (PST) Message-ID: <86c98c57-08a7-20b3-2346-803b497d562a@linaro.org> Date: Mon, 6 Mar 2023 11:41:53 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.8.0 Subject: Re: [PATCH 2/2] soc: qcom: llcc: Add configuration data for SM7150 Content-Language: en-US To: Danila Tikhonov , robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, agross@kernel.org, andersson@kernel.org, abel.vesa@linaro.org, rishabhb@codeaurora.org, saiprakash.ranjan@codeaurora.org Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org References: <20230305202627.402386-1-danila@jiaxyga.com> <20230305202627.402386-3-danila@jiaxyga.com> From: Konrad Dybcio In-Reply-To: <20230305202627.402386-3-danila@jiaxyga.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 5.03.2023 21:26, Danila Tikhonov wrote: > Add LLCC configuration data for SM7150 SoC. > > Signed-off-by: Danila Tikhonov > --- I checked the msm-4.14 data, everything lgtm Reviewed-by: Konrad Dybcio Konrad > drivers/soc/qcom/llcc-qcom.c | 17 +++++++++++++++++ > 1 file changed, 17 insertions(+) > > diff --git a/drivers/soc/qcom/llcc-qcom.c b/drivers/soc/qcom/llcc-qcom.c > index 23ce2f78c4ed..0ed8cd4f66da 100644 > --- a/drivers/soc/qcom/llcc-qcom.c > +++ b/drivers/soc/qcom/llcc-qcom.c > @@ -227,6 +227,14 @@ static const struct llcc_slice_config sm6350_data[] = { > { LLCC_MODPE, 29, 64, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0 }, > }; > > +static const struct llcc_slice_config sm7150_data[] = { > + { LLCC_CPUSS, 1, 512, 1, 0, 0xF, 0x0, 0, 0, 0, 1, 1 }, > + { LLCC_MDM, 8, 128, 2, 0, 0xF, 0x0, 0, 0, 0, 1, 0 }, > + { LLCC_GPUHTW, 11, 256, 1, 1, 0xF, 0x0, 0, 0, 0, 1, 0 }, > + { LLCC_GPU, 12, 256, 1, 1, 0xF, 0x0, 0, 0, 0, 1, 0 }, > + { LLCC_NPU, 23, 512, 1, 0, 0xF, 0x0, 0, 0, 0, 1, 0 }, > +}; > + > static const struct llcc_slice_config sm8150_data[] = { > { LLCC_CPUSS, 1, 3072, 1, 1, 0xFFF, 0x0, 0, 0, 0, 1, 1 }, > { LLCC_VIDSC0, 2, 512, 2, 1, 0xFFF, 0x0, 0, 0, 0, 1, 0 }, > @@ -464,6 +472,14 @@ static const struct qcom_llcc_config sm6350_cfg = { > .edac_reg_offset = &llcc_v1_edac_reg_offset, > }; > > +static const struct qcom_llcc_config sm7150_cfg = { > + .sct_data = sm7150_data, > + .size = ARRAY_SIZE(sm7150_data), > + .need_llcc_cfg = true, > + .reg_offset = llcc_v1_reg_offset, > + .edac_reg_offset = &llcc_v1_edac_reg_offset, > +}; > + > static const struct qcom_llcc_config sm8150_cfg = { > .sct_data = sm8150_data, > .size = ARRAY_SIZE(sm8150_data), > @@ -1022,6 +1038,7 @@ static const struct of_device_id qcom_llcc_of_match[] = { > { .compatible = "qcom,sc8280xp-llcc", .data = &sc8280xp_cfg }, > { .compatible = "qcom,sdm845-llcc", .data = &sdm845_cfg }, > { .compatible = "qcom,sm6350-llcc", .data = &sm6350_cfg }, > + { .compatible = "qcom,sm7150-llcc", .data = &sm7150_cfg }, > { .compatible = "qcom,sm8150-llcc", .data = &sm8150_cfg }, > { .compatible = "qcom,sm8250-llcc", .data = &sm8250_cfg }, > { .compatible = "qcom,sm8350-llcc", .data = &sm8350_cfg },