Date:   Mon, 6 Mar 2023 14:04:57 +0000
From:   Conor Dooley <conor.dooley@microchip.com>
To:     Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
CC:     William Qiu <william.qiu@starfivetech.com>,
        <linux-riscv@lists.infradead.org>, <devicetree@vger.kernel.org>,
        <linux-mmc@vger.kernel.org>, Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Jaehoon Chung <jh80.chung@samsung.com>,
        Ulf Hansson <ulf.hansson@linaro.org>,
        <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v4 4/4] dt-bindings: syscon: Add StarFive syscon doc
Message-ID: <ZAXzCfs7wkxaUWN7@wendy>
References: <20230215113249.47727-1-william.qiu@starfivetech.com>
 <20230215113249.47727-5-william.qiu@starfivetech.com>
 <41bcc545-6eda-6c30-c600-d97ef009abf2@linaro.org>
 <Y+4Fbrz8EYIGyjVj@wendy>
 <8388695b-98f9-223b-1e15-86aaefec2d6f@linaro.org>
MIME-Version: 1.0
Content-Type: multipart/signed; micalg=pgp-sha256;
        protocol="application/pgp-signature"; boundary="wJtNSCpBxG2n/Eo9"
Content-Disposition: inline
In-Reply-To: <8388695b-98f9-223b-1e15-86aaefec2d6f@linaro.org>
Precedence: bulk

--wJtNSCpBxG2n/Eo9
Content-Type: text/plain; charset=us-ascii
Content-Disposition: inline
Content-Transfer-Encoding: quoted-printable

Hey William,

On Thu, Feb 16, 2023 at 11:31:45AM +0100, Krzysztof Kozlowski wrote:
> On 16/02/2023 11:29, Conor Dooley wrote:
> > On Thu, Feb 16, 2023 at 11:23:00AM +0100, Krzysztof Kozlowski wrote:
> >> On 15/02/2023 12:32, William Qiu wrote:
> >>> Add documentation to describe StarFive System Controller Registers.
> >>>
> >>> Signed-off-by: William Qiu <william.qiu@starfivetech.com>
> >>> ---
> >>
> >> Thank you for your patch. There is something to discuss/improve.

Could you please submit a v5 of this, with the bits below fixed,
whenever Hal sends their next version of the base dts series?
There's no maintainers coverage for a soc/starfive subdirectory of
dt-bindings yet, so please CC conor@kernel.org &
linux-riscv@lists.infradead.com on the patch.

Thanks,
Conor.

> >>
> >>> +properties:
> >>> +  compatible:
> >>> +    items:
> >>> +      - enum:
> >>> +          - starfive,jh7110-stg-syscon
> >>> +          - starfive,jh7110-sys-syscon
> >>> +          - starfive,jh7110-aon-syscon
> >>
> >> Maybe keep them ordered alphabetically?
> >>
> >>> +      - const: syscon
> >>> +
> >>> +  reg:
> >>> +    maxItems: 1
> >>> +
> >>> +required:
> >>> +  - compatible
> >>> +  - reg
> >>> +
> >>> +additionalProperties: false
> >>> +
> >>> +examples:
> >>> +  - |
> >>> +    syscon@10240000 {
> >>> +        compatible =3D "starfive,jh7110-stg-syscon", "syscon";
> >>> +        reg =3D <0x10240000 0x1000>;
> >>> +    };
> >>
> >> Keep only one example. All others are the same.
> >=20
> > With these fixed:
> > Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
> >=20
> > @Krzysztof, I assume the location of the binding is okay with you since
> > you didn't object to it & I suppose this one is up to me to apply if so.
>=20
> Yeah, generic sysreg devices go to soc. If their primary functions were
> different (e.g. clock controller which also is syscon), then they should
> go to respective directories, but it's not the case here, I think.
>=20
> Best regards,
> Krzysztof
>=20
>=20

--wJtNSCpBxG2n/Eo9
Content-Type: application/pgp-signature; name="signature.asc"

-----BEGIN PGP SIGNATURE-----

iHUEABYIAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCZAXzCQAKCRB4tDGHoIJi
0vj0APsEG0BpMkkdDazmeJqsM4kXPSsQBhKaSl/nXRDAbqD8GwD+O0NncG358/h5
GJTAkWmJAdokfjZhfNFmBhbBeRylkgU=
=Y/Ml
-----END PGP SIGNATURE-----

--wJtNSCpBxG2n/Eo9--