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Subject: Re: [PATCH v3 1/3] clk: k210: remove an implicit 64-bit division
From:   Stephen Boyd <sboyd@kernel.org>
Cc:     Jesse Taube <mr.bossman075@gmail.com>,
        linux-riscv@lists.infradead.org, linux-clk@vger.kernel.org,
        linux-kernel@vger.kernel.org, Yimin Gu <ustcymgu@gmail.com>,
        Damien Le Moal <damien.lemoal@wdc.com>,
        Michael Turquette <mturquette@baylibre.com>,
        Waldemar Brodkorb <wbx@openadk.org>,
        Albert Ou <aou@eecs.berkeley.edu>,
        Palmer Dabbelt <palmer@dabbelt.com>,
        Paul Walmsley <paul.walmsley@sifive.com>,
        Conor Dooley <conor.dooley@microchip.com>,
        kernel test robot <lkp@intel.com>
To:     Conor Dooley <conor@kernel.org>
Date:   Mon, 06 Mar 2023 14:37:22 -0800
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Quoting Conor Dooley (2023-03-06 14:35:01)
> On Mon, Mar 06, 2023 at 02:31:00PM -0800, Stephen Boyd wrote:
> > Quoting Jesse Taube (2023-02-28 16:26:55)
> > > diff --git a/drivers/clk/clk-k210.c b/drivers/clk/clk-k210.c
> > > index 67a7cb3503c3..4eed667eddaf 100644
> > > --- a/drivers/clk/clk-k210.c
> > > +++ b/drivers/clk/clk-k210.c
> > > @@ -495,7 +495,7 @@ static unsigned long k210_pll_get_rate(struct clk=
_hw *hw,
> > >         f =3D FIELD_GET(K210_PLL_CLKF, reg) + 1;
> > >         od =3D FIELD_GET(K210_PLL_CLKOD, reg) + 1;
> > > =20
> > > -       return (u64)parent_rate * f / (r * od);
> > > +       return div_u64((u64)parent_rate * f, r * od);
> >=20
> > The equation 'r * od' can't overflow 32-bits, right?
>=20
> Yah, I checked that when writing the patch. They're 4-bit fields:

Awesome