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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by DM6NAM11FT103.mail.protection.outlook.com (10.13.172.75) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.6178.16 via Frontend Transport; Tue, 7 Mar 2023 02:21:13 +0000 Received: from platform-dev1.pensando.io (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.34; Mon, 6 Mar 2023 20:20:36 -0600 From: Brad Larson To: CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: Re: [PATCH v10 10/15] spi: dw: Add support for AMD Pensando Elba SoC Date: Mon, 6 Mar 2023 18:20:02 -0800 Message-ID: <20230307022002.28874-1-blarson@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230306160017.ptd3ogundxvus5zm@mobilestation> References: <20230306160017.ptd3ogundxvus5zm@mobilestation> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM6NAM11FT103:EE_|SJ1PR12MB6314:EE_ X-MS-Office365-Filtering-Correlation-Id: ec77ae33-c016-44f3-24c4-08db1eb29fce X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Mar 2023 02:21:13.6218 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: ec77ae33-c016-44f3-24c4-08db1eb29fce X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT103.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ1PR12MB6314 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Mar 06, 2023 at 16:00, Serge Semin wrote: > On Sun, Mar 05, 2023 at 08:07:34PM -0800, Brad Larson wrote: >> The AMD Pensando Elba SoC includes a DW apb_ssi v4 controller >> with device specific chip-select control. The Elba SoC >> provides four chip-selects where the native DW IP supports >> two chip-selects. The Elba DW_SPI instance has two native >> CS signals that are always overridden. >> >> Signed-off-by: Brad Larson >> --- >> >> v10 changes: >> - Delete struct dw_spi_elba, use regmap directly in priv >> >> v9 changes: >> - Add use of macros GENMASK() and BIT() >> - Change ELBA_SPICS_SHIFT() to ELBA_SPICS_OFFSET() >> >> --- >> drivers/spi/spi-dw-mmio.c | 65 +++++++++++++++++++++++++++++++++++++++ >> 1 file changed, 65 insertions(+) >> >> diff --git a/drivers/spi/spi-dw-mmio.c b/drivers/spi/spi-dw-mmio.c >> index 26c40ea6dd12..2076cb83a11b 100644 >> --- a/drivers/spi/spi-dw-mmio.c >> +++ b/drivers/spi/spi-dw-mmio.c >> @@ -53,6 +53,20 @@ struct dw_spi_mscc { >> void __iomem *spi_mst; /* Not sparx5 */ >> }; >> >> +/* >> + * Elba SoC does not use ssi, pin override is used for cs 0,1 and >> + * gpios for cs 2,3 as defined in the device tree. >> + * >> + * cs: | 1 0 >> + * bit: |---3-------2-------1-------0 >> + * | cs1 cs1_ovr cs0 cs0_ovr >> + */ >> +#define ELBA_SPICS_REG 0x2468 >> +#define ELBA_SPICS_OFFSET(cs) ((cs) << 1) >> +#define ELBA_SPICS_MASK(cs) (GENMASK(1, 0) << ELBA_SPICS_OFFSET(cs)) >> +#define ELBA_SPICS_SET(cs, val) \ >> + ((((val) << 1) | BIT(0)) << ELBA_SPICS_OFFSET(cs)) >> + >> /* >> * The Designware SPI controller (referred to as master in the documentation) >> * automatically deasserts chip select when the tx fifo is empty. The chip >> @@ -237,6 +251,56 @@ static int dw_spi_canaan_k210_init(struct platform_device *pdev, >> return 0; >> } >> >> +static void dw_spi_elba_override_cs(struct regmap *syscon, int cs, int enable) >> +{ >> + regmap_update_bits(syscon, ELBA_SPICS_REG, ELBA_SPICS_MASK(cs), >> + ELBA_SPICS_SET(cs, enable)); >> +} >> + >> +static void dw_spi_elba_set_cs(struct spi_device *spi, bool enable) >> +{ >> + struct dw_spi *dws = spi_master_get_devdata(spi->master); >> + struct dw_spi_mmio *dwsmmio = container_of(dws, struct dw_spi_mmio, dws); >> + struct regmap *syscon = dwsmmio->priv; >> + u8 cs; >> + >> + cs = spi->chip_select; >> + if (cs < 2) >> + dw_spi_elba_override_cs(syscon, spi->chip_select, enable); >> + >> + /* >> + * The DW SPI controller needs a native CS bit selected to start >> + * the serial engine. >> + */ >> + spi->chip_select = 0; >> + dw_spi_set_cs(spi, enable); >> + spi->chip_select = cs; >> +} >> + >> +static int dw_spi_elba_init(struct platform_device *pdev, >> + struct dw_spi_mmio *dwsmmio) >> +{ >> + const char *syscon_name = "amd,pensando-elba-syscon"; > >> + struct device_node *np = pdev->dev.of_node; > > Drop this since it's used only once below. > Removed >> + struct device_node *node; Renamed *node to *np >> + struct regmap *syscon; >> + >> - node = of_parse_phandle(np, syscon_name, 0); > > node = of_parse_phandle(dev_of_node(pdev->dev), syscon_name, 0); > > + if (!node) > >> + return dev_err_probe(&pdev->dev, -ENODEV, "failed to find %s\n", >> + syscon_name); > > Hm, using dev_err_probe() with known error value seems overkill. Changed to: return -ENODEV >> + > >> + syscon = syscon_node_to_regmap(node); >> + if (IS_ERR(syscon)) >> + return dev_err_probe(&pdev->dev, PTR_ERR(syscon), >> + "syscon regmap lookup failed\n"); > > of_node_put() is missing in the error and success paths. Result of the above changes are: + const char *syscon_name = "amd,pensando-elba-syscon"; + struct device_node *np; + struct regmap *syscon; + + np = of_parse_phandle(pdev->dev.of_node, syscon_name, 0); + if (!np) + return -ENODEV; + + syscon = syscon_node_to_regmap(np); + of_node_put(np); + if (IS_ERR(syscon)) + return dev_err_probe(&pdev->dev, PTR_ERR(syscon), + "syscon regmap lookup failed\n"); Regards, Brad