Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 35ABFC61DA4 for ; Tue, 7 Mar 2023 02:38:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230120AbjCGCik (ORCPT ); Mon, 6 Mar 2023 21:38:40 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41268 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229679AbjCGCie (ORCPT ); Mon, 6 Mar 2023 21:38:34 -0500 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B94B72C66B; Mon, 6 Mar 2023 18:38:01 -0800 (PST) X-UUID: fb0e4a88bc9011ed945fc101203acc17-20230307 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=W/mmAj3ygBdEF86h3r4dVT7v4eaSbR96QC46mFmH3HQ=; b=tbmolumLWnV2vNi5NBb9FUTKIojPD0VSKV6KixZrPdps5Vk077MScBeLMf04gncFpIbqucN0bfLJ5At3j7JW1wI5asJXQJC46f7eXq/2+B0vYsDP7RUqWX+IBHeYGaBSQd7KeFJkTr/BusoF2PqKRakdfVVibv+nNHdYHhxdGJs=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.20,REQID:59e53c22-9774-4db5-8de7-3da50d81b58a,IP:0,U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:95,FILE:0,BULK:0,RULE:Release_Ham,ACTION :release,TS:95 X-CID-INFO: VERSION:1.1.20,REQID:59e53c22-9774-4db5-8de7-3da50d81b58a,IP:0,URL :0,TC:0,Content:0,EDM:0,RT:0,SF:95,FILE:0,BULK:0,RULE:Spam_GS981B3D,ACTION :quarantine,TS:95 X-CID-META: VersionHash:25b5999,CLOUDID:962ef7f4-ddba-41c3-91d9-10eeade8eac7,B ulkID:230307103720VV1R2TFN,BulkQuantity:0,Recheck:0,SF:38|29|28|17|19|48,T C:nil,Content:0,EDM:-3,IP:nil,URL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0 ,OSI:0,OSA:0,AV:0 X-CID-BVR: 0,NGT X-UUID: fb0e4a88bc9011ed945fc101203acc17-20230307 Received: from mtkmbs10n1.mediatek.inc [(172.21.101.34)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1453589498; Tue, 07 Mar 2023 10:37:19 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.186) by mtkmbs13n2.mediatek.inc (172.21.101.108) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.25; Tue, 7 Mar 2023 10:37:17 +0800 Received: from mhfsdcap04.gcn.mediatek.inc (10.17.3.154) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.25 via Frontend Transport; Tue, 7 Mar 2023 10:37:16 +0800 From: Yong Wu To: Joerg Roedel , Matthias Brugger , Mauro Carvalho Chehab , Rob Herring CC: Will Deacon , Robin Murphy , Krzysztof Kozlowski , Hans Verkuil , , , , , , , , AngeloGioacchino Del Regno , , , , Yunfei Dong , kyrie wu , , , , Yong Wu Subject: [PATCH v5 09/11] arm64: dts: mt8195: Add dma-ranges for the parent "soc" node Date: Tue, 7 Mar 2023 10:35:05 +0800 Message-ID: <20230307023507.13306-10-yong.wu@mediatek.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230307023507.13306-1-yong.wu@mediatek.com> References: <20230307023507.13306-1-yong.wu@mediatek.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org After commit f1ad5338a4d5 ("of: Fix "dma-ranges" handling for bus controllers"), the dma-ranges property is not allowed for the leaf node. But our iommu/dma-ranges is 16GB, we still expect separate the 16GB dma-range like: a) display is in 0 - 4GB; b) vcodec is in 4GB - 8GB; c) camera is in 8GB - 12GB. We can not expect all the masters add a parent node for them, especial for the existed drivers/nodes. Thus, we add whole the 16GB dma-ranges in the parent "soc" node. Signed-off-by: Yong Wu Reviewed-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt8195.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi index 8f1264d5290b..0f5a31ca1b70 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi @@ -364,6 +364,7 @@ soc { #size-cells = <2>; compatible = "simple-bus"; ranges; + dma-ranges = <0x0 0x0 0x0 0x0 0x4 0x0>; gic: interrupt-controller@c000000 { compatible = "arm,gic-v3"; -- 2.25.1