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References: <20230302125215.214014-1-keguang.zhang@gmail.com>
 <20230302125215.214014-3-keguang.zhang@gmail.com> <CAMRc=Me3yVwQm8=CmUVM2gyYnFxntW47-OOPdmq1TzXTJB5ETg@mail.gmail.com>
In-Reply-To: <CAMRc=Me3yVwQm8=CmUVM2gyYnFxntW47-OOPdmq1TzXTJB5ETg@mail.gmail.com>
From:   Keguang Zhang <keguang.zhang@gmail.com>
Date:   Tue, 7 Mar 2023 11:45:36 +0800
Message-ID: <CAJhJPsX1q6PGSb+eoCSdCC2_vDtbaShLLzEbuNOqD_Jzd8Ozdw@mail.gmail.com>
Subject: Re: [PATCH v2 2/5] gpio: loongson1: Use readl() & writel()
To:     Bartosz Golaszewski <brgl@bgdev.pl>
Cc:     linux-gpio@vger.kernel.org, devicetree@vger.kernel.org,
        linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org,
        Linus Walleij <linus.walleij@linaro.org>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
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Precedence: bulk

On Mon, Mar 6, 2023 at 5:30=E2=80=AFPM Bartosz Golaszewski <brgl@bgdev.pl> =
wrote:
>
> On Thu, Mar 2, 2023 at 1:52=E2=80=AFPM Keguang Zhang <keguang.zhang@gmail=
.com> wrote:
> >
> > This patch replace __raw_readl() & __raw_writel() with readl() & writel=
().
> >
>
> Please say WHY you're doing this.
>
readl & writel contain memory barriers which can guarantee access order.

> Bart
>
> > Signed-off-by: Keguang Zhang <keguang.zhang@gmail.com>
> > ---
> > V1 -> V2: Split this change to a separate patch
> > ---
> >  drivers/gpio/gpio-loongson1.c | 8 ++++----
> >  1 file changed, 4 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/gpio/gpio-loongson1.c b/drivers/gpio/gpio-loongson=
1.c
> > index 8862c9ea0d41..b6c11caa3ade 100644
> > --- a/drivers/gpio/gpio-loongson1.c
> > +++ b/drivers/gpio/gpio-loongson1.c
> > @@ -23,8 +23,8 @@ static int ls1x_gpio_request(struct gpio_chip *gc, un=
signed int offset)
> >         unsigned long flags;
> >
> >         raw_spin_lock_irqsave(&gc->bgpio_lock, flags);
> > -       __raw_writel(__raw_readl(gpio_reg_base + GPIO_CFG) | BIT(offset=
),
> > -                    gpio_reg_base + GPIO_CFG);
> > +       writel(readl(gpio_reg_base + GPIO_CFG) | BIT(offset),
> > +              gpio_reg_base + GPIO_CFG);
> >         raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);
> >
> >         return 0;
> > @@ -35,8 +35,8 @@ static void ls1x_gpio_free(struct gpio_chip *gc, unsi=
gned int offset)
> >         unsigned long flags;
> >
> >         raw_spin_lock_irqsave(&gc->bgpio_lock, flags);
> > -       __raw_writel(__raw_readl(gpio_reg_base + GPIO_CFG) & ~BIT(offse=
t),
> > -                    gpio_reg_base + GPIO_CFG);
> > +       writel(readl(gpio_reg_base + GPIO_CFG) & ~BIT(offset),
> > +              gpio_reg_base + GPIO_CFG);
> >         raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);
> >  }
> >
> > --
> > 2.34.1
> >


--
Best regards,

Kelvin Cheung