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From:   Alexandre Ghiti <alexghiti@rivosinc.com>
Date:   Tue, 7 Mar 2023 17:38:02 +0100
Message-ID: <CAHVXubhRtDRwm3AQAio6cUJ5vRxDbLerc0ys7H0dgpzx01iCpQ@mail.gmail.com>
Subject: Re: [PATCH v6 0/2] riscv: Use PUD/P4D/PGD pages for the linear mapping
To:     Anup Patel <apatel@ventanamicro.com>
Cc:     Paul Walmsley <paul.walmsley@sifive.com>,
        Palmer Dabbelt <palmer@dabbelt.com>,
        Albert Ou <aou@eecs.berkeley.edu>,
        Rob Herring <robh+dt@kernel.org>,
        Frank Rowand <frowand.list@gmail.com>,
        linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
        devicetree@vger.kernel.org
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On Tue, Mar 7, 2023 at 2:36=E2=80=AFPM Alexandre Ghiti <alexghiti@rivosinc.=
com> wrote:
>
> On Tue, Mar 7, 2023 at 2:19=E2=80=AFPM Anup Patel <apatel@ventanamicro.co=
m> wrote:
> >
> > Hi Alex,
> >
> > On Tue, Mar 7, 2023 at 12:22=E2=80=AFAM Alexandre Ghiti <alexghiti@rivo=
sinc.com> wrote:
> > >
> > > Hi Anup,
> > >
> > > On Mon, Mar 6, 2023 at 5:33=E2=80=AFPM Anup Patel <apatel@ventanamicr=
o.com> wrote:
> > > >
> > > > On Wed, Mar 1, 2023 at 1:56=E2=80=AFPM Alexandre Ghiti <alexghiti@r=
ivosinc.com> wrote:
> > > > >
> > > > > This patchset intends to improve tlb utilization by using hugepag=
es for
> > > > > the linear mapping.
> > > > >
> > > > > base-commit-tag: v6.2-rc7
> > > > >
> > > > > v6:
> > > > > - quiet LLVM warning by casting phys_ram_base into an unsigned lo=
ng
> > > > >
> > > > > v5:
> > > > > - Fix nommu builds by getting rid of riscv_pfn_base in patch 1, t=
hanks
> > > > >   Conor
> > > > > - Add RB from Andrew
> > > > >
> > > > > v4:
> > > > > - Rebase on top of v6.2-rc3, as noted by Conor
> > > > > - Add Acked-by Rob
> > > > >
> > > > > v3:
> > > > > - Change the comment about initrd_start VA conversion so that it =
fits
> > > > >   ARM64 and RISCV64 (and others in the future if needed), as sugg=
ested
> > > > >   by Rob
> > > > >
> > > > > v2:
> > > > > - Add a comment on why RISCV64 does not need to set initrd_start/=
end that
> > > > >   early in the boot process, as asked by Rob
> > > > >
> > > > > Alexandre Ghiti (2):
> > > > >   riscv: Get rid of riscv_pfn_base variable
> > > > >   riscv: Use PUD/P4D/PGD pages for the linear mapping
> > > >
> > > > I tried this series but it is getting stuck after reaching user spa=
ce.
> > > >
> > > > Does this series require some other dependent patches ?
> > >
> > > No it should not. Let me take a look: what's your config and the base=
 commit?
> >
> > Please try the alexghiti_test branch at:
> > https://github.com/avpatel/linux.git
> >
> > Compile the kernel with defconfig and launch QEMU as follows:
> > qemu-system-riscv64 -M virt -m 1G -nographic -bios
> > opensbi/build/platform/generic/firmware/fw_jump.bin -kernel
> > ./build-riscv64/arch/riscv/boot/Image -append "root=3D/dev/ram rw
> > console=3DttyS0 earlycon" -initrd ./rootfs_riscv64.img
> >
> > In the above command, rootfs_riscv64.img is a busybox based rootfs.
>
> Ok I can reproduce the problem. I'll debug that a bit further but
> increasing memory allows booting to userspace.
>

This is a real bug and that's because I should split the 1G page that
contains the kernel text alias (and anything that we map with stricter
rights) or something similar. I'll get back soon with a fix.

Thanks Anup for the report,

Alex

> >
> > Regards,
> > Anup
> >
> > >
> > > >
> > > > Regards,
> > > > Anup
> > > >
> > > > >
> > > > >  arch/riscv/include/asm/page.h | 19 +++++++++++++++++--
> > > > >  arch/riscv/mm/init.c          | 28 ++++++++++++++++++----------
> > > > >  arch/riscv/mm/physaddr.c      | 16 ++++++++++++++++
> > > > >  drivers/of/fdt.c              | 11 ++++++-----
> > > > >  4 files changed, 57 insertions(+), 17 deletions(-)
> > > > >
> > > > > --
> > > > > 2.37.2
> > > > >