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[87.147.81.70]) by smtp.gmail.com with ESMTPSA id r17-20020a50aad1000000b004bfa4f747d2sm7269585edc.54.2023.03.07.13.01.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Mar 2023 13:01:27 -0800 (PST) Date: Tue, 7 Mar 2023 22:01:25 +0100 From: Philipp Hortmann To: Greg Kroah-Hartman , linux-staging@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH v2 2/2] staging: rtl8192e: Remove unused Array Rtl8192PciERadioD_Array Message-ID: <608ced17b85ca321fdc0026c686e3c62a9d6d8cd.1678222487.git.philipp.g.hortmann@gmail.com> References: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The array Rtl8192PciERadioD_Array is only used in function rtl92e_config_rf_path which is only called in function rtl92e_config_rf. In function rtl92e_config_rf a termination condition for the loop is set to priv->num_total_rf_path = RTL819X_TOTAL_RF_PATH = 2. The loop is only executed with numbers 0 and 1 for eRFPath. So the function rtl92e_config_rf_path is only called with eRFPath for 0 and 1 and never with 3 that would make the "case RF90_PATH_D:" be called. Remove resulting dead code. Signed-off-by: Philipp Hortmann --- V1->V2: Changed argumentation in the description and subject --- drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c | 12 ------------ drivers/staging/rtl8192e/rtl8192e/r8192E_phy.h | 2 -- drivers/staging/rtl8192e/rtl8192e/table.c | 3 --- drivers/staging/rtl8192e/rtl8192e/table.h | 2 -- 4 files changed, 19 deletions(-) diff --git a/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c b/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c index fe0ef52c163a..a9e83ba811b0 100644 --- a/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c +++ b/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c @@ -649,18 +649,6 @@ u8 rtl92e_config_rf_path(struct net_device *dev, enum rf90_radio_path eRFPath) bMask12Bits, Rtl819XRadioB_Array[i+1]); - } - break; - case RF90_PATH_D: - for (i = 0; i < RadioD_ArrayLength; i += 2) { - if (Rtl819XRadioD_Array[i] == 0xfe) { - msleep(100); - continue; - } - rtl92e_set_rf_reg(dev, eRFPath, Rtl819XRadioD_Array[i], - bMask12Bits, - Rtl819XRadioD_Array[i+1]); - } break; default: diff --git a/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.h b/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.h index 6772ed300591..ac640033e843 100644 --- a/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.h +++ b/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.h @@ -14,14 +14,12 @@ #define RadioA_ArrayLength RadioA_ArrayLengthPciE #define RadioB_ArrayLength RadioB_ArrayLengthPciE #define MACPHY_Array_PGLength MACPHY_Array_PGLengthPciE -#define RadioD_ArrayLength RadioD_ArrayLengthPciE #define PHY_REG_1T2RArrayLength PHY_REG_1T2RArrayLengthPciE #define Rtl819XMACPHY_Array_PG Rtl8192PciEMACPHY_Array_PG #define Rtl819XMACPHY_Array Rtl8192PciEMACPHY_Array #define Rtl819XRadioA_Array Rtl8192PciERadioA_Array #define Rtl819XRadioB_Array Rtl8192PciERadioB_Array -#define Rtl819XRadioD_Array Rtl8192PciERadioD_Array #define Rtl819XAGCTAB_Array Rtl8192PciEAGCTAB_Array #define Rtl819XPHY_REG_1T2RArray Rtl8192PciEPHY_REG_1T2RArray diff --git a/drivers/staging/rtl8192e/rtl8192e/table.c b/drivers/staging/rtl8192e/rtl8192e/table.c index 4e97ad4b8fd7..7101061e3519 100644 --- a/drivers/staging/rtl8192e/rtl8192e/table.c +++ b/drivers/staging/rtl8192e/rtl8192e/table.c @@ -325,9 +325,6 @@ u32 Rtl8192PciERadioB_Array[RadioB_ArrayLengthPciE] = { 0x007, 0x00000700, }; -u32 Rtl8192PciERadioD_Array[RadioD_ArrayLengthPciE] = { - 0x0, }; - u32 Rtl8192PciEMACPHY_Array[] = { 0x03c, 0xffff0000, 0x00000f0f, 0x340, 0xffffffff, 0x161a1a1a, diff --git a/drivers/staging/rtl8192e/rtl8192e/table.h b/drivers/staging/rtl8192e/rtl8192e/table.h index 981e8b57d3de..b6d4e9696452 100644 --- a/drivers/staging/rtl8192e/rtl8192e/table.h +++ b/drivers/staging/rtl8192e/rtl8192e/table.h @@ -17,8 +17,6 @@ extern u32 Rtl8192PciEPHY_REG_1T2RArray[PHY_REG_1T2RArrayLengthPciE]; extern u32 Rtl8192PciERadioA_Array[RadioA_ArrayLengthPciE]; #define RadioB_ArrayLengthPciE 78 extern u32 Rtl8192PciERadioB_Array[RadioB_ArrayLengthPciE]; -#define RadioD_ArrayLengthPciE 2 -extern u32 Rtl8192PciERadioD_Array[RadioD_ArrayLengthPciE]; #define MACPHY_ArrayLengthPciE 18 extern u32 Rtl8192PciEMACPHY_Array[MACPHY_ArrayLengthPciE]; #define MACPHY_Array_PGLengthPciE 30 -- 2.39.2