Message-ID: <64ab4061-6a8b-662e-1c7a-99b0da26751c@linaro.org>
Date:   Wed, 8 Mar 2023 12:15:39 +0100
MIME-Version: 1.0
User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101
 Thunderbird/102.8.0
Subject: Re: [PATCH v7 3/6] phy: qcom-qmp: Add SM6125 UFS PHY support
Content-Language: en-US
To:     Johan Hovold <johan@kernel.org>
Cc:     Lux Aliaga <they@mint.lgbt>, agross@kernel.org,
        andersson@kernel.org, robh+dt@kernel.org,
        krzysztof.kozlowski+dt@linaro.org, vkoul@kernel.org,
        kishon@kernel.org, alim.akhtar@samsung.com, avri.altman@wdc.com,
        bvanassche@acm.org, keescook@chromium.org, tony.luck@intel.com,
        gpiccoli@igalia.com, ~postmarketos/upstreaming@lists.sr.ht,
        linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
        linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org,
        linux-scsi@vger.kernel.org, linux-hardening@vger.kernel.org,
        phone-devel@vger.kernel.org, martin.botka@somainline.org,
        marijn.suijten@somainline.org
References: <20230306170817.3806-1-they@mint.lgbt>
 <20230306170817.3806-4-they@mint.lgbt>
 <25c17af5-8f6b-a2c3-dab3-f9bc69711db7@linaro.org>
 <ZAhrT1ICTQjfdeGq@hovoldconsulting.com>
From:   Konrad Dybcio <konrad.dybcio@linaro.org>
In-Reply-To: <ZAhrT1ICTQjfdeGq@hovoldconsulting.com>
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 7bit
Precedence: bulk


On 8.03.2023 12:02, Johan Hovold wrote:
> On Wed, Mar 08, 2023 at 11:09:48AM +0100, Konrad Dybcio wrote:
>>
>>
>> On 6.03.2023 18:08, Lux Aliaga wrote:
>>> The SM6125 UFS PHY is compatible with the one from SM6115. Add a
>>> compatible for it and modify the config from SM6115 to make them
>>> compatible with the SC8280XP binding
>>>
>>> Signed-off-by: Lux Aliaga <they@mint.lgbt>
>>> Reviewed-by: Martin Botka <martin.botka@somainline.org>
>>> ---
>>>  drivers/phy/qualcomm/phy-qcom-qmp-ufs.c | 12 ++++++++++++
>>>  1 file changed, 12 insertions(+)
>>>
>>> diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
>>> index 318eea35b972..44c29fdfc551 100644
>>> --- a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
>>> +++ b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
>>> @@ -620,6 +620,13 @@ static const char * const qmp_phy_vreg_l[] = {
>>>  	"vdda-phy", "vdda-pll",
>>>  };
>>>  
>>> +static const struct qmp_ufs_offsets qmp_ufs_offsets_v3_660 = {
>>> +	.serdes		= 0,
>>> +	.pcs		= 0xc00,
>>> +	.tx		= 0x400,
>>> +	.rx		= 0x600,
>>> +};
>>> +
>>>  static const struct qmp_ufs_offsets qmp_ufs_offsets_v5 = {
>>>  	.serdes		= 0,
>>>  	.pcs		= 0xc00,
>>> @@ -693,6 +700,8 @@ static const struct qmp_phy_cfg sdm845_ufsphy_cfg = {
>>>  static const struct qmp_phy_cfg sm6115_ufsphy_cfg = {
>>>  	.lanes			= 1,
>>>  
>>> +	.offsets		= &qmp_ufs_offsets_v3_660,
>> Will this not trigger OOB r/w for the users of qcom,sm6115-smp-ufs-phy
>> which specify the regions separately (old binding style)?
> 
> No, that should work fine.
So do you think the SM6115 binding could be updated too? Or should
we keep it as-is for ABI purposes?..

> 
> But looks like this series needs to be rebased on 6.3-rc1 as these
> offsets are now already set in mainline.
..Or did you do that already and I can't find it?

Konrad
> 
> Johan