Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E27A6C74A44 for ; Wed, 8 Mar 2023 11:37:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229981AbjCHLgl (ORCPT ); Wed, 8 Mar 2023 06:36:41 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58240 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230059AbjCHLgE (ORCPT ); Wed, 8 Mar 2023 06:36:04 -0500 Received: from mail-ed1-x52c.google.com (mail-ed1-x52c.google.com [IPv6:2a00:1450:4864:20::52c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 31684AF294; Wed, 8 Mar 2023 03:36:03 -0800 (PST) Received: by mail-ed1-x52c.google.com with SMTP id a25so64692931edb.0; Wed, 08 Mar 2023 03:36:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; t=1678275361; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:from:to:cc:subject:date :message-id:reply-to; bh=pkqtkcAPDhHcKXHJJhzZGkadcuoCSlM8Je8c/sebOSk=; b=Uxditw6bMjdlAa4tQirez9bPQT80pkxBdU0vkvdov83E7EJCKgtMgvvEzigUMmICqo 7r/28EKK/HXqXqGNu15VJbPT/3FwMttnWz4rKiQcNDFj1ZpavEgj7JulU+J/Q0vYFNQO Dg4rQpFnQetRbBsl2TFx10mpdUpQ9XHuPuDagLxxMQ2VCgIYgBul67bTcSjTYfNmluYF WJQvqrJRnlRhnNV10ouHOMtcuwSlTh5yQP9UcydhkTx16LtxJJcFrsk3f0MhooN+RwQ8 qHPdkuOKtekXLgETObHPMZqt4UJw/xk5X4tfcJYCHGQ7qCWSpoOspReezBbzdOt2ZpJA lVxw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1678275361; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=pkqtkcAPDhHcKXHJJhzZGkadcuoCSlM8Je8c/sebOSk=; b=tXNX81rztjA3XYCJ97q0PVaAkPH6rZSWCGMkOMIiKt/qGc8fyF9WTQCn8HZpFs6fAR uk/XCkHdIAqeoplov+ACdx0hsehAblQDgROlbk5MkuNNybDX/XGQ9Oq0io/kdkDaXfZc fI0nPxhosgJN9wBWBaxK7q0J+VR2U6ezRhcCZoAFqMqL0e78F6zKO2SxtJ/0dt+ygopu yfi6R1VeJmFbWU0X80gbRLv6kCS8+kIHHs+uLUdHdz51Vl2gIhbbEzGjydljfMUINCt2 5tRYfDDfOK46RtapZtSsLBHHruOiXCjJl69iVUVYujoPMaDpSV/aOG+E7R16F1Hck3JT B+dg== X-Gm-Message-State: AO0yUKVzzeRIRrWAHVHtcTdo3PkypiBPJagSdDyzK6k6YxwI1Xjza1RJ ICouQhVxifU4s41IndZcX42dxtBWqhCnSRAdsZ0= X-Google-Smtp-Source: AK7set+8IVqHUCP7lpW4Tu0PFR/uGhVXOh2XCgJ0nI8owJdMs3y7iNlYcasQPs28+hxxB5z53ejUH1b0gSyCIQYYEl4= X-Received: by 2002:a50:baa6:0:b0:4c1:6acc:ea5 with SMTP id x35-20020a50baa6000000b004c16acc0ea5mr9818706ede.4.1678275361500; Wed, 08 Mar 2023 03:36:01 -0800 (PST) MIME-Version: 1.0 References: <20230302125215.214014-1-keguang.zhang@gmail.com> <20230302125215.214014-3-keguang.zhang@gmail.com> <2d5521ff21ea4b99be3dd2e449f53934@AcuMS.aculab.com> In-Reply-To: <2d5521ff21ea4b99be3dd2e449f53934@AcuMS.aculab.com> From: Keguang Zhang Date: Wed, 8 Mar 2023 19:35:45 +0800 Message-ID: Subject: Re: [PATCH v2 2/5] gpio: loongson1: Use readl() & writel() To: David Laight Cc: Bartosz Golaszewski , "linux-gpio@vger.kernel.org" , "devicetree@vger.kernel.org" , "linux-mips@vger.kernel.org" , "linux-kernel@vger.kernel.org" , Linus Walleij , Rob Herring , Krzysztof Kozlowski Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Mar 8, 2023 at 5:42=E2=80=AFPM David Laight wrote: > > From: Keguang Zhang > > Sent: 07 March 2023 03:46 > > > > On Mon, Mar 6, 2023 at 5:30=E2=80=AFPM Bartosz Golaszewski wrote: > > > > > > On Thu, Mar 2, 2023 at 1:52=E2=80=AFPM Keguang Zhang wrote: > > > > > > > > This patch replace __raw_readl() & __raw_writel() with readl() & wr= itel(). > > > > > > > > > > Please say WHY you're doing this. > > > > > readl & writel contain memory barriers which can guarantee access order= . > > So what... > > There is a data dependency between the read and write. > The read can't be scheduled before the lock is acquired. > The write can't be scheduled after the lock is released. > > So any barriers in readl()/writel() aren't needed. > > If they are only compile barriers they'll have no real effect. > OTOH if the cpu needs actual synchronising instructions (as some > ppc do) then they will slow things down. > Thanks for the explanation. The intention of this change is to prevent possible order issues. At present, __raw_readl() & __raw_writel() do work fine. I will drop this patch in the next version. > David > > > > > > Bart > > > > > > > Signed-off-by: Keguang Zhang > > > > --- > > > > V1 -> V2: Split this change to a separate patch > > > > --- > > > > drivers/gpio/gpio-loongson1.c | 8 ++++---- > > > > 1 file changed, 4 insertions(+), 4 deletions(-) > > > > > > > > diff --git a/drivers/gpio/gpio-loongson1.c b/drivers/gpio/gpio-loon= gson1.c > > > > index 8862c9ea0d41..b6c11caa3ade 100644 > > > > --- a/drivers/gpio/gpio-loongson1.c > > > > +++ b/drivers/gpio/gpio-loongson1.c > > > > @@ -23,8 +23,8 @@ static int ls1x_gpio_request(struct gpio_chip *gc= , unsigned int offset) > > > > unsigned long flags; > > > > > > > > raw_spin_lock_irqsave(&gc->bgpio_lock, flags); > > > > - __raw_writel(__raw_readl(gpio_reg_base + GPIO_CFG) | BIT(of= fset), > > > > - gpio_reg_base + GPIO_CFG); > > > > + writel(readl(gpio_reg_base + GPIO_CFG) | BIT(offset), > > > > + gpio_reg_base + GPIO_CFG); > > > > raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags); > > > > > > > > return 0; > > > > @@ -35,8 +35,8 @@ static void ls1x_gpio_free(struct gpio_chip *gc, = unsigned int offset) > > > > unsigned long flags; > > > > > > > > raw_spin_lock_irqsave(&gc->bgpio_lock, flags); > > > > - __raw_writel(__raw_readl(gpio_reg_base + GPIO_CFG) & ~BIT(o= ffset), > > > > - gpio_reg_base + GPIO_CFG); > > > > + writel(readl(gpio_reg_base + GPIO_CFG) & ~BIT(offset), > > > > + gpio_reg_base + GPIO_CFG); > > > > raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags); > > > > } > > > > > > > > -- > > > > 2.34.1 > > > > > > > > > > > > -- > > Best regards, > > > > Kelvin Cheung > > - > Registered Address Lakeside, Bramley Road, Mount Farm, Milton Keynes, MK1= 1PT, UK > Registration No: 1397386 (Wales) -- Best regards, Kelvin Cheung