Message-ID: <80b5867c-ea8f-f9d2-aee5-a5a3741e0694@linaro.org>
Date:   Wed, 8 Mar 2023 17:41:21 +0100
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Subject: Re: [PATCH v4 3/9] arm64: dts: qcom: sa8775p: add the i2c18 node
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To:     Bartosz Golaszewski <brgl@bgdev.pl>,
        Andy Gross <agross@kernel.org>,
        Bjorn Andersson <andersson@kernel.org>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc:     linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
        linux-kernel@vger.kernel.org,
        Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
References: <20230308104009.260451-1-brgl@bgdev.pl>
 <20230308104009.260451-4-brgl@bgdev.pl>
From:   Konrad Dybcio <konrad.dybcio@linaro.org>
In-Reply-To: <20230308104009.260451-4-brgl@bgdev.pl>
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On 8.03.2023 11:40, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
> 
> Add a disabled node for the I2C interface that's exposed on the
> sa8775p-ride development board.
> 
> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
> ---
>  arch/arm64/boot/dts/qcom/sa8775p.dtsi | 22 ++++++++++++++++++++++
>  1 file changed, 22 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> index 5efb3e4f2335..d65e7826f1d7 100644
> --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> @@ -3,6 +3,7 @@
>   * Copyright (c) 2023, Linaro Limited
>   */
>  
> +#include <dt-bindings/interconnect/qcom,icc.h>
>  #include <dt-bindings/interrupt-controller/arm-gic.h>
>  #include <dt-bindings/clock/qcom,rpmh.h>
>  #include <dt-bindings/clock/qcom,sa8775p-gcc.h>
> @@ -502,6 +503,27 @@ qupv3_id_2: geniqup@8c0000 {
>  			clock-names = "m-ahb", "s-ahb";
>  			iommus = <&apps_smmu 0x5a3 0x0>;
>  			status = "disabled";
> +
> +			i2c18: i2c@890000 {
> +				compatible = "qcom,geni-i2c";
> +				reg = <0x0 0x00890000 0x0 0x4000>;
> +				#address-cells = <1>;
> +				#size-cells = <0>;
These two should come right before statusdisabled, but I think
that's a leftover from 8280 standing out and us having discussions
about this and other stuff.. Not sure if we want to untie this
knot here on in a big separate commit

> +			

	interrupts = <GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH>;
interrupts should come after reg

> +				clocks = <&gcc GCC_QUPV3_WRAP2_S4_CLK>;
> +				clock-names = "se";
> +				interconnects = <&clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS
> +						 &clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS>,
> +						<&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
> +						 &config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS>,
> +						<&aggre2_noc MASTER_QUP_2 QCOM_ICC_TAG_ALWAYS
> +						 &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
> +				interconnect-names = "qup-core",
> +						     "qup-config",
> +						     "qup-memory";
> +				power-domains = <&rpmhpd SA8775P_CX>;
> +				status = "disabled";
The node contents in general LGTM

Konrad
> +			};
>  		};
>  
>  		intc: interrupt-controller@17a00000 {