Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 62666C64EC4 for ; Thu, 9 Mar 2023 07:47:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230192AbjCIHrf (ORCPT ); Thu, 9 Mar 2023 02:47:35 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46384 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230050AbjCIHqn (ORCPT ); Thu, 9 Mar 2023 02:46:43 -0500 Received: from mail-lf1-x134.google.com (mail-lf1-x134.google.com [IPv6:2a00:1450:4864:20::134]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 456EDDDF17 for ; Wed, 8 Mar 2023 23:46:12 -0800 (PST) Received: by mail-lf1-x134.google.com with SMTP id j11so1118135lfg.13 for ; Wed, 08 Mar 2023 23:46:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1678347970; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=p1r1zyYA9t+QO+JcvGnUo/RuruD1eWdYkbb9TESedm0=; b=Tn0kT9pG+OpUApaG8znHQ+ekGoIVakiLzD95tkVlpHddMSmj9vog6WG1rG3HUDZpgC BuaWUky0NZEFG3ZjPUEXCHe4cjuJR4SB0LLxYr/6BEwlPalYqJ6aOkj73iU3gVyGurYv dgBNUTKW/8M2EvU3Wvmzljdpz+fwneQxO6uQOe1kVLLE7T8m6XX3o8gLdJAbG+wZy4zM JYyqjcm1V+q7sf8tnlK/k2TEUIIRKSJM4OF3CUv3TDMnLRdu342Hsyf6/PmXD1hTlhiV bPOKa03FmOGd6MT+j+We7hC3UCMI3wCQXCQKuU11VOTZ204ZYL8/1oLy8hOm4JNjrCJM m4pw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1678347970; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=p1r1zyYA9t+QO+JcvGnUo/RuruD1eWdYkbb9TESedm0=; b=qL+iWGnPtHSB3LwK2IvMDkfsMUjx+8IfhkgRPHJO0faQLa9aImACi0i0jfexuJjxAP PXPi1wvxVgB4O4+Yl0/Ecm7gZDC/k9Qv4kJgittXPn2VJPiWEmBC870yOIjJJcDRpmnb shJFDU0ifypqZC9ctXoUBEFwKgBUFxgTZZ0O0tsCPhZXGrC4reb1yyydEzQv9JFYyeuy jotza8MIml1yyDAX8QTpjGg5aZeWOBW7Ca9xVq5jIWXaHFGYjwP+nprc34uC5BJ/O3pr 0LVUm2dIaPONWBhejwIgkJVCV1EV4D2nsHjvSoUd56Ew3pW4rY5joxM/8AohW9zBERm8 sSsw== X-Gm-Message-State: AO0yUKUjPBPyl/aDmCFajnHVux3mTBA64ZDo8OSwo6ONc4vE10TwpM9F cQeBPI6bPEh01MhzBUUN7FFZEg== X-Google-Smtp-Source: AK7set/7z6Z0N4Go3hn+jqpbROoq+slAfzXqziRoxhWDiBhE25au89gRe6ixCefCQGyqKogt0n9jjw== X-Received: by 2002:ac2:54a5:0:b0:4dc:4b92:dbc4 with SMTP id w5-20020ac254a5000000b004dc4b92dbc4mr5293556lfk.14.1678347970521; Wed, 08 Mar 2023 23:46:10 -0800 (PST) Received: from [127.0.1.1] ([85.235.12.219]) by smtp.gmail.com with ESMTPSA id a6-20020a056512020600b004bb766e01a4sm2568972lfo.245.2023.03.08.23.46.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Mar 2023 23:46:10 -0800 (PST) From: Linus Walleij Date: Thu, 09 Mar 2023 08:46:02 +0100 Subject: [PATCH v3 14/17] gpio: omap: Drop irq_base MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20230215-immutable-chips-v3-14-972542092a77@linaro.org> References: <20230215-immutable-chips-v3-0-972542092a77@linaro.org> In-Reply-To: <20230215-immutable-chips-v3-0-972542092a77@linaro.org> To: Mun Yew Tham , Bartosz Golaszewski , Joel Stanley , Andrew Jeffery , Alban Bedel , Orson Zhai , Baolin Wang , Chunyan Zhang , Jay Fang , Daniel Palmer , Romain Perier , Santosh Shilimkar , Kevin Hilman , William Breathitt Gray Cc: linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-omap@vger.kernel.org, Linus Walleij , Janusz Krzysztofik , Tony Lindgren , Arnd Bergmann , Marc Zyngier X-Mailer: b4 0.12.1 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The OMAP1 at one point was using static irqs but that time is gone, OMAP1 uses sparse irqs like all other multiplatform targets so this static allocation of descriptors should just go. Cc: Janusz Krzysztofik Cc: Tony Lindgren Acked-by: Arnd Bergmann Acked-by: Marc Zyngier Reviewed-by: Tony Lindgren Signed-off-by: Linus Walleij --- drivers/gpio/gpio-omap.c | 15 --------------- 1 file changed, 15 deletions(-) diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c index f5f3d4b22452..1cbd040cf796 100644 --- a/drivers/gpio/gpio-omap.c +++ b/drivers/gpio/gpio-omap.c @@ -992,7 +992,6 @@ static int omap_gpio_chip_init(struct gpio_bank *bank, struct irq_chip *irqc, struct gpio_irq_chip *irq; static int gpio; const char *label; - int irq_base = 0; int ret; /* @@ -1024,19 +1023,6 @@ static int omap_gpio_chip_init(struct gpio_bank *bank, struct irq_chip *irqc, } bank->chip.ngpio = bank->width; -#ifdef CONFIG_ARCH_OMAP1 - /* - * REVISIT: Once we have OMAP1 supporting SPARSE_IRQ, we can drop - * irq_alloc_descs() since a base IRQ offset will no longer be needed. - */ - irq_base = devm_irq_alloc_descs(bank->chip.parent, - -1, 0, bank->width, 0); - if (irq_base < 0) { - dev_err(bank->chip.parent, "Couldn't allocate IRQ numbers\n"); - return -ENODEV; - } -#endif - /* MPUIO is a bit different, reading IRQ status clears it */ if (bank->is_mpuio && !bank->regs->wkup_en) irqc->irq_set_wake = NULL; @@ -1047,7 +1033,6 @@ static int omap_gpio_chip_init(struct gpio_bank *bank, struct irq_chip *irqc, irq->default_type = IRQ_TYPE_NONE; irq->num_parents = 1; irq->parents = &bank->irq; - irq->first = irq_base; ret = gpiochip_add_data(&bank->chip, bank); if (ret) -- 2.34.1