Date:   Thu, 9 Mar 2023 12:23:24 +0100
From:   Miquel Raynal <miquel.raynal@bootlin.com>
To:     Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Cc:     =?UTF-8?B?UmFmYcWCIE1pxYJlY2tp?= <zajec5@gmail.com>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Shawn Guo <shawnguo@kernel.org>,
        Sascha Hauer <s.hauer@pengutronix.de>,
        Pengutronix Kernel Team <kernel@pengutronix.de>,
        Fabio Estevam <festevam@gmail.com>,
        NXP Linux Team <linux-imx@nxp.com>,
        Michael Walle <michael@walle.cc>, gregkh@linuxfoundation.org,
        devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
        linux-kernel@vger.kernel.org, u-boot@lists.denx.de,
        =?UTF-8?B?UmFmYcWCIE1pxYJlY2tp?= <rafal@milecki.pl>
Subject: Re: [PATCH 2/4] nvmem: core: allow nvmem_cell_post_process_t
 callbacks to adjust buffer
Message-ID: <20230309122324.4b012a58@xps-13>
In-Reply-To: <2dc096f5-f5ce-f99b-42ac-0fb24682239a@linaro.org>
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        <2dc096f5-f5ce-f99b-42ac-0fb24682239a@linaro.org>
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Hi Srinivas,

srinivas.kandagatla@linaro.org wrote on Thu, 9 Mar 2023 10:53:07 +0000:

> On 09/03/2023 10:32, Miquel Raynal wrote:
> > Hi Srinivas,
> >=20
> > srinivas.kandagatla@linaro.org wrote on Thu, 9 Mar 2023 10:12:24 +0000:
> >  =20
> >> On 22/02/2023 17:22, Rafa=C5=82 Mi=C5=82ecki wrote: =20
> >>> @@ -1791,11 +1792,15 @@ ssize_t nvmem_device_cell_read(struct nvmem_d=
evice *nvmem,
> >>>    	if (!nvmem)
> >>>    		return -EINVAL; =20
> >>>    > +	/* Cells with read_post_process hook may realloc buffer we can=
't allow here */ =20
> >>> +	if (info->read_post_process)
> >>> +		return -EINVAL; =20
> >> This should probably go in 1/4 patch. Other than that series looks goo=
d to me. =20
> >=20
> > FYI patch 1/4 is also carried by the nvmem-layouts series, so it's
> > probably best to keep these 2 patches separated to simplify the merging=
. =20
> that is intermediate thing, but Ideally this change belongs to 1/4 patch,=
 so once I apply these patches then we can always rebase layout series on t=
op of nvmem-next

Well, I still don't see the need for this patch because we have no use
for it *after* the introduction of layouts. Yes in some cases changing
the size of a cell might maybe be needed, but right now the use case is
to provide a MAC address, we know beforehand the size of the cell, so
there is no need, currently, for this hack.

Whatever. If you want it, just merge it. But *please*, I would like
to see these layouts in, so what's the plan?

Thanks,
Miqu=C3=A8l