Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C38DAC64EC4 for ; Thu, 9 Mar 2023 16:35:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229923AbjCIQfO convert rfc822-to-8bit (ORCPT ); Thu, 9 Mar 2023 11:35:14 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60964 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230417AbjCIQeT (ORCPT ); Thu, 9 Mar 2023 11:34:19 -0500 Received: from frasgout.his.huawei.com (frasgout.his.huawei.com [185.176.79.56]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 624AA1116A9 for ; Thu, 9 Mar 2023 08:25:56 -0800 (PST) Received: from lhrpeml500002.china.huawei.com (unknown [172.18.147.226]) by frasgout.his.huawei.com (SkyGuard) with ESMTP id 4PXYwl1bqWz6J6rf; Fri, 10 Mar 2023 00:07:19 +0800 (CST) Received: from lhrpeml500005.china.huawei.com (7.191.163.240) by lhrpeml500002.china.huawei.com (7.191.160.78) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.21; Thu, 9 Mar 2023 16:07:54 +0000 Received: from lhrpeml500005.china.huawei.com ([7.191.163.240]) by lhrpeml500005.china.huawei.com ([7.191.163.240]) with mapi id 15.01.2507.021; Thu, 9 Mar 2023 16:07:54 +0000 From: Shameerali Kolothum Thodi To: Jason Gunthorpe CC: Jean-Philippe Brucker , Nicolin Chen , "robin.murphy@arm.com" , "will@kernel.org" , "eric.auger@redhat.com" , "kevin.tian@intel.com" , "baolu.lu@linux.intel.com" , "joro@8bytes.org" , "linux-arm-kernel@lists.infradead.org" , "iommu@lists.linux.dev" , "linux-kernel@vger.kernel.org" , "yi.l.liu@intel.com" Subject: RE: [PATCH v1 02/14] iommufd: Add nesting related data structures for ARM SMMUv3 Thread-Topic: [PATCH v1 02/14] iommufd: Add nesting related data structures for ARM SMMUv3 Thread-Index: AQHZUnWTVXhuXoh0OkWPSyQY1srSfq7ydQKAgAAVzLCAAAsqAIAAANyQgAAEp4CAAACeQA== Date: Thu, 9 Mar 2023 16:07:54 +0000 Message-ID: <4c1f57adbe0c4d48849d585508595939@huawei.com> References: <364cfbe5b228ab178093db2de13fa3accf7a6120.1678348754.git.nicolinc@nvidia.com> <20230309134217.GA1673607@myrica> <213a05ef06944a55a148995053b187f8@huawei.com> <39979642ba8042ba9d4de651fecfeffb@huawei.com> In-Reply-To: Accept-Language: en-GB, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.202.227.178] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 8BIT MIME-Version: 1.0 X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > -----Original Message----- > From: Jason Gunthorpe [mailto:jgg@nvidia.com] > Sent: 09 March 2023 16:00 > To: Shameerali Kolothum Thodi > Cc: Jean-Philippe Brucker ; Nicolin Chen > ; robin.murphy@arm.com; will@kernel.org; > eric.auger@redhat.com; kevin.tian@intel.com; baolu.lu@linux.intel.com; > joro@8bytes.org; linux-arm-kernel@lists.infradead.org; > iommu@lists.linux.dev; linux-kernel@vger.kernel.org; yi.l.liu@intel.com > Subject: Re: [PATCH v1 02/14] iommufd: Add nesting related data structures > for ARM SMMUv3 > > On Thu, Mar 09, 2023 at 03:51:42PM +0000, Shameerali Kolothum Thodi > wrote: > > > > For ARM cases where there is no shared VMID space with KVM, the ARM > > > VMID should be somehow assigned to the iommfd_ctx itself and the alloc > > > domain op should receive it from there. > > > > Is there any use of VMID outside SMMUv3? I was thinking if nested domain > alloc > > doesn't provide the KVM instance, then SMMUv3 can use its internal VMID. > > When we talk about exposing an SMMUv3 IOMMU CMDQ directly to > userspace then > VMID is the security token that protects it. > > So in that environment every domain under the same iommufd should > share the same VMID so that the CMDQ's also share the same VMID. > > I expect this to be a common sort of requirement as we will see > userspace command queues in the other HW as well. > > So, I suppose the answer for now is that ARM SMMUv3 should just > allocate one VMID per iommu_domain and there should be no VMID in the > uapi at all. > > Moving all iommu_domains to share the same VMID is a future patch. > > Though.. I have no idea how vVMID is handled in the SMMUv3 > architecture. I suppose the guest IOMMU HW caps are set in a way that > it knows it does not have VMID? I think, Guest only sets up the SMMUv3 S1 stage and it doesn't use VMID. Thanks, Shameer