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[69.109.179.158]) by smtp.gmail.com with ESMTPSA id l19-20020ac84593000000b003c03ae61af9sm5769003qtn.3.2023.03.09.11.33.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 09 Mar 2023 11:33:21 -0800 (PST) Date: Thu, 9 Mar 2023 14:33:19 -0500 From: William Breathitt Gray To: Andy Shevchenko Cc: linus.walleij@linaro.org, brgl@bgdev.pl, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, broonie@kernel.org, techsupport@winsystems.com, Paul Demetrotion Subject: Re: [PATCH v4 3/3] gpio: ws16c48: Migrate to the regmap API Message-ID: References: <4b6cd42426521808962d68a44952b95818fc5daf.1678106722.git.william.gray@linaro.org> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="gYdWBrdL+KqBcWeI" Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --gYdWBrdL+KqBcWeI Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Wed, Mar 08, 2023 at 03:06:18PM +0200, Andy Shevchenko wrote: > On Tue, Mar 07, 2023 at 09:51:26PM -0500, William Breathitt Gray wrote: > > On Mon, Mar 06, 2023 at 04:20:03PM +0200, Andy Shevchenko wrote: > > > On Mon, Mar 06, 2023 at 07:59:53AM -0500, William Breathitt Gray wrot= e: >=20 > ... >=20 > > > > - raw_spinlock_t lock; > > > > + spinlock_t lock; > > >=20 > > > This is a regression. > > > That said, do we need a support of raw spin locks in the regmap IRQ? > >=20 > > So this code has a similar need as the gpio-pcie-idio-24 patch: guard > > registers between handle_mask_sync() and set_type_config(); however, now > > we also need to protect registers in regmap_irq_thread(). We can't use a > > mutex here because regmap_irq_thread() is executed in an interrupt > > context so we cannot sleep. > >=20 > > This might be a mistake in my understanding: I chose spinlock_t here > > because I believed it to map out to a raw_spinlock_t anyway underneath, > > whereas on RT kernels it would map out to whatever the equivalent is. I > > suspect this is not actually the case. Would using raw_spinlock_t > > explicitly be the correct way to go for this particular case? >=20 > You may read the commit message of the 27d9098cff6e ("pinctrl: intel: > Use raw_spinlock for locking"). TL;DR: this is only affects IRQ chips, > so if your GPIO controller is _not_ an IRQ chip, you are fine. >=20 > WRT the other driver, can_sleep may reduce scope of the use of GPIOs > and even make a regression if any consumer don't want that behaviour > and currently works. Looking through kernel/irq/manage.c, I see the raw_spinlock desc->lock is taken in __setup_irq() before potentially calling __irq_set_trigger() which ultimate calls the chip->irq_set_type() callback. So it seems unsafe to sleep within at least this callback which is utilized by both drivers, so both gpio-pcie-idio-24 and gpio-ws16c48 will need the raw_spinlock lock type afterall. I'll make the necessary changes and release a v5 of this patchset. As an aside, I wonder if locking is not needed if we only utilize the set_type_config() callback, because the desc->lock taken by the irq subsystem will be enough to guard between regmap_irq_set_type() and regmap_irq_thread(). It's not valid for our particular case here because we also utilize a handle_mask_sync() callback (chip_bus_lock() is not protected by desc->chip) but it's something to think about. William Breathitt Gray --gYdWBrdL+KqBcWeI Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEARYKAB0WIQSNN83d4NIlKPjon7a1SFbKvhIjKwUCZAo0fwAKCRC1SFbKvhIj K0GCAPsH4oQt3CLZycxBwi4Kq5J9EIU2IK7jPmsloJkz5HKO3QEAzcBw1CEUwlq6 bpcLQ/rnxaWqs1u1vlASpoDW4U/9swQ= =aBu6 -----END PGP SIGNATURE----- --gYdWBrdL+KqBcWeI--