From:   Alexander Stein <alexander.stein@ew.tq-group.com>
To:     rafael@kernel.org, daniel.lezcano@linaro.org, amitk@kernel.org,
        rui.zhang@intel.com, robh+dt@kernel.org,
        krzysztof.kozlowski+dt@linaro.org, shawnguo@kernel.org,
        s.hauer@pengutronix.de, festevam@gmail.com,
        linux-arm-kernel@lists.infradead.org
Cc:     linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org,
        linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
        linux-imx@nxp.com, "Alice Guo (OSS)" <alice.guo@oss.nxp.com>
Subject: Re: [PATCH v1 4/4] arm64: dts: imx93: Add CPU thermal zone
Date:   Fri, 10 Mar 2023 09:20:11 +0100
Message-ID: <112132134.nniJfEyVGO@steina-w>
Organization: TQ-Systems GmbH
In-Reply-To: <20230105101748.6714-5-alice.guo@oss.nxp.com>
References: <20230105101748.6714-1-alice.guo@oss.nxp.com> <20230105101748.6714-5-alice.guo@oss.nxp.com>
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Hi,

Am Donnerstag, 5. Januar 2023, 11:17:48 CET schrieb Alice Guo (OSS):
> From: Alice Guo <alice.guo@nxp.com>
>=20
> Add CPU thermal zone and attach it to the TMU which monitors the CPU
> temperature.
>=20
> Signed-off-by: Alice Guo <alice.guo@nxp.com>
> Reviewed-by: Jacky Bai <ping.bai@nxp.com>
> Reviewed-by: Ye Li <ye.li@nxp.com>
> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
> ---
>  arch/arm64/boot/dts/freescale/imx93.dtsi | 48 ++++++++++++++++++++++++
>  1 file changed, 48 insertions(+)
>=20
> diff --git a/arch/arm64/boot/dts/freescale/imx93.dtsi
> b/arch/arm64/boot/dts/freescale/imx93.dtsi index 6808321ed809..60306f3c5e=
7f
> 100644
> --- a/arch/arm64/boot/dts/freescale/imx93.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx93.dtsi
> @@ -8,6 +8,7 @@
>  #include <dt-bindings/input/input.h>
>  #include <dt-bindings/interrupt-controller/arm-gic.h>
>  #include <dt-bindings/power/fsl,imx93-power.h>
> +#include <dt-bindings/thermal/thermal.h>
>=20
>  #include "imx93-pinfunc.h"
>=20
> @@ -116,6 +117,38 @@
>  		interrupt-parent =3D <&gic>;
>  	};
>=20
> +	thermal-zones {
> +		cpu-thermal {
> +			polling-delay-passive =3D <250>;
> +			polling-delay =3D <2000>;
> +
> +			thermal-sensors =3D <&tmu 0>;
> +
> +			trips {
> +				cpu_alert: cpu-alert {
> +					temperature =3D <80000>;
> +					hysteresis =3D <2000>;
> +					type =3D "passive";
> +				};
> +
> +				cpu_crit: cpu-crit {
> +					temperature =3D <90000>;
> +					hysteresis =3D <2000>;
> +					type =3D "critical";
> +				};
> +		};

This brace needs an additional indent.

Best regards,
Alexander

> +
> +			cooling-maps {
> +				map0 {
> +					trip =3D <&cpu_alert>;
> +					cooling-device =3D
> +						<&A55_0=20
THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> +						<&A55_1=20
THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> +				};
> +			};
> +		};
> +	};
> +
>  	soc@0 {
>  		compatible =3D "simple-bus";
>  		#address-cells =3D <1>;
> @@ -280,6 +313,21 @@
>  				compatible =3D "fsl,imx93-anatop",=20
"syscon";
>  				reg =3D <0x44480000 0x10000>;
>  			};
> +
> +			tmu: tmu@44482000 {
> +				compatible =3D "fsl,imx93-tmu";
> +				reg =3D <0x44482000 0x1000>;
> +				clocks =3D <&clk IMX93_CLK_TMC_GATE>;
> +				little-endian;
> +				fsl,tmu-calibration =3D <0x0000000e=20
0x800000da
> +						       0x00000029=20
0x800000e9
> +						       0x00000056=20
0x80000102
> +						       0x000000a2=20
0x8000012a
> +						       0x00000116=20
0x80000166
> +						       0x00000195=20
0x800001a7
> +						       0x000001b2=20
0x800001b6>;
> +				#thermal-sensor-cells =3D <1>;
> +			};
>  		};
>=20
>  		aips2: bus@42000000 {


=2D-=20
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