Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 04425C64EC4 for ; Fri, 10 Mar 2023 09:53:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230290AbjCJJx0 (ORCPT ); Fri, 10 Mar 2023 04:53:26 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56014 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229823AbjCJJxX (ORCPT ); Fri, 10 Mar 2023 04:53:23 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CF4174393A; Fri, 10 Mar 2023 01:53:20 -0800 (PST) Received: from [192.168.86.246] (cpc87451-finc19-2-0-cust61.4-2.cable.virginm.net [82.11.51.62]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: tanureal) by madras.collabora.co.uk (Postfix) with ESMTPSA id 27FED660305B; Fri, 10 Mar 2023 09:53:19 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1678441999; bh=yTOKzUGzEBdFLHPokAIe0S9LUwi4oC8dcd7Rms8wGGE=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=edTm25Ezw29SJrUN31+J6cyYULJUxBgIMwZ9dJFyVd4onZOYT+3tLFjuf+HPlZH7k luRaOP4miwxydIwZm1IdkpVWolXDNosYMBJrcoQyJTSiDM/jtxvGZ3z9ZWWPsQRpQv c4hSayZbLAffR0x0+IAn5GkEwdLZ52+FesOHymfKPrA+IcKvk6VD5fyQm+mNAwznXz TXvIv99kYtKPnpEZ6o/UNbeE6oVTgrnR97533VIgUHFVdRK3xFx6Y+TKrWtsFSeRI7 tDRIMKUrLWJABJaCiovqsxFKn2n9Bz/v26fL7QFPN3WZwH78za3Iy6HQrxpwKD2cTe +2+ACL/I4EcBQ== Message-ID: <37adba14-1add-187c-01b5-5109be38018e@collabora.com> Date: Fri, 10 Mar 2023 09:53:16 +0000 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.8.0 Subject: Re: [PATCH 1/7] irqchip/gic-v3: Add a DMA Non-Coherent flag Content-Language: en-US To: Marc Zyngier Cc: Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Heiko Stuebner , Thomas Gleixner , Lorenzo Pieralisi , Krzysztof Wilczynski , Bjorn Helgaas , Qu Wenruo , Piotr Oniszczuk , Peter Geis , Kever Yang , linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, kernel@collabora.com, Robin Murphy References: <20230310080518.78054-1-lucas.tanure@collabora.com> <20230310080518.78054-2-lucas.tanure@collabora.com> From: Lucas Tanure In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 10-03-2023 08:56, Marc Zyngier wrote: > On 2023-03-10 08:05, Lucas Tanure wrote: >> The GIC600 integration in RK356x, used in rk3588, doesn't support >> any of the shareability or cacheability attributes, and requires >> both values to be set to 0b00 for all the ITS and Redistributor >> tables. >> >> This is loosely based on prior work from XiaoDong Huang and >> Peter Geis fixing this issue specifically for Rockchip 356x. > > No. > > If we are going to do *anything* about this thing, it is by > describing the actual topology. What do you mean by describe the topology? What kind of information are you expecting? And it has to work for both DT > and ACPI. > > Alternatively, this is an erratum. > >         M.