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Fri, 10 Mar 2023 11:06:38 -0800 From: Dipen Patel To: , , , , , , , , , , , , , CC: Dipen Patel Subject: [PATCH V3 2/6] dt-bindings: timestamp: Add Tegra234 support Date: Fri, 10 Mar 2023 11:06:30 -0800 Message-ID: <20230310190634.5053-3-dipenp@nvidia.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230310190634.5053-1-dipenp@nvidia.com> References: <20230310190634.5053-1-dipenp@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 Content-Type: text/plain X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1NAM11FT101:EE_|PH7PR12MB7234:EE_ X-MS-Office365-Filtering-Correlation-Id: 4a2a12d1-aa95-474c-c35d-08db219a9859 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 0LuXL6QZkZGpOchzl9frMhvOSPAUEpkbe2b10/xKEzJazqDh54TNklpqBXf2soHHt1uDobqATwahPgy3rbPBzbIRLKlagC5tsjDk7MQCRtGf7Rd1m1Vd1ZIbWa0duF2HUiHR5Y64u6fEqDLHDqWXB82eaSfjbOIlyZPL/mUMtf7WD2UL/tLXIfs1z6MdHcLh/pzgsS5FYqfHw543SbpeSHI9lxwYYumqCAh2OrIpyrqP3I1VApxtdpZfW5AV6Qqn1VLI8dLrJwb0DVr1cDYr0jt22Lg0zLprdxksMQW2JQPO1VOgLPTrtZjZ8yWpG8peznwhNub/gb8X3bCtwjffZD9iWISJHfVd0i2ko/MbIXQs33K4GPNFjNa6HnUNN3YR0XBa2Iy8xpIJgo618Utwylgi1WGm41E2zWgm/Vlp9z8q00RzjW8UvlcbFwYsUZ9mO9OKXt3Mvs1cG1aGmEz5exLxuBIgrcRTR5PZU1OHEeSv+buZ5I+Ih5yThavEftzy6kEvia6kR7ZcsxOsRtneGpTpXEauMKLl7lSRtkcoTUtzXnXr5z4MyLAgnIrBoPc6Qu0GLapyTs8kaAvJisHkWQC9FSYQc7nvvHVbvgxutX7TrQ2rSuvHmzZDjJNzx6DXkmQOqYJkRZ9W7PC0pRGAhsI8Z71gxka3jbwnXK9lpf//XoDgQu9iBMkgvHSyi4dWUJyMMQbQAFDGWzcpps1KuOQ9PYUgF9ink2xWoXOgWhCiIM85q7/25nfxe/1G4DuKY682Otxz04cHwV3ryUOVdDi1IkiNenF2KJSkBScioQpJREqyD17IXrTVIJ3veiy4ZKf8pHkWmF+EaxHcqW/kpB/GFFGa+Gmp2yvjqhrR6A637gfUh0NLu3tejdrFzSRCs945V0GeU5tPd62p/PliZA== X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230025)(4636009)(39860400002)(346002)(136003)(396003)(376002)(451199018)(46966006)(40470700004)(36840700001)(26005)(966005)(107886003)(1076003)(7696005)(2616005)(83380400001)(426003)(186003)(6666004)(336012)(316002)(70586007)(8676002)(70206006)(110136005)(36860700001)(8936002)(7636003)(82740400003)(41300700001)(5660300002)(4326008)(7416002)(2906002)(47076005)(921005)(356005)(82310400005)(86362001)(478600001)(40460700003)(40480700001)(36756003)(83996005)(2101003);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 10 Mar 2023 19:06:46.6663 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 4a2a12d1-aa95-474c-c35d-08db219a9859 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT101.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB7234 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Added timestamp provider support for the Tegra234 in devicetree bindings. In addition, it addresses review comments from the previous review round as follows: - Removes nvidia,slices property. This was not necessary as it is a constant value and can be hardcoded inside the driver code. - Adds nvidia,gpio-controller property. This simplifies how GTE driver retrieves GPIO controller instance, see below explanation. Without this property code would look like: if (of_device_is_compatible(dev->of_node, "nvidia,tegra194-gte-aon")) hte_dev->c = gpiochip_find("tegra194-gpio-aon", tegra_get_gpiochip_from_name); else if (of_device_is_compatible(dev->of_node, "nvidia,tegra234-gte-aon")) hte_dev->c = gpiochip_find("tegra234-gpio-aon", tegra_get_gpiochip_from_name); else return -ENODEV; This means for every future addition of the compatible string, if else condition statements have to be expanded. With the property: gpio_ctrl = of_parse_phandle(dev->of_node, "nvidia,gpio-controller", 0); .... hte_dev->c = gpiochip_find(gpio_ctrl, tegra_get_gpiochip_from_of_node); We haven't technically started making use of these bindings, so backwards-compatibility shouldn't be an issue yet. Signed-off-by: Dipen Patel --- v2: - Removed nvidia,slices property - Added nvidia,gpio-controller based on review comments from Thierry, this will help simplify the hte provider driver. v3: - Explained changes in detail in commit message - Added allOf section per review comment .../timestamp/nvidia,tegra194-hte.yaml | 31 ++++++++++++------- 1 file changed, 20 insertions(+), 11 deletions(-) diff --git a/Documentation/devicetree/bindings/timestamp/nvidia,tegra194-hte.yaml b/Documentation/devicetree/bindings/timestamp/nvidia,tegra194-hte.yaml index c31e207d1652..eb904ac2f331 100644 --- a/Documentation/devicetree/bindings/timestamp/nvidia,tegra194-hte.yaml +++ b/Documentation/devicetree/bindings/timestamp/nvidia,tegra194-hte.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/timestamp/nvidia,tegra194-hte.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Tegra194 on chip generic hardware timestamping engine (HTE) +title: Tegra on chip generic hardware timestamping engine (HTE) provider maintainers: - Dipen Patel @@ -23,6 +23,8 @@ properties: enum: - nvidia,tegra194-gte-aon - nvidia,tegra194-gte-lic + - nvidia,tegra234-gte-aon + - nvidia,tegra234-gte-lic reg: maxItems: 1 @@ -38,14 +40,11 @@ properties: minimum: 1 maximum: 256 - nvidia,slices: - $ref: /schemas/types.yaml#/definitions/uint32 + nvidia,gpio-controller: + $ref: /schemas/types.yaml#/definitions/phandle description: - HTE lines are arranged in 32 bit slice where each bit represents different - line/signal that it can enable/configure for the timestamp. It is u32 - property and depends on the HTE instance in the chip. The value 3 is for - GPIO GTE and 11 for IRQ GTE. - enum: [3, 11] + The phandle to AON gpio controller instance. This is required to handle + namespace conversion between GPIO and GTE. '#timestamp-cells': description: @@ -59,9 +58,20 @@ required: - compatible - reg - interrupts - - nvidia,slices - "#timestamp-cells" +allOf: + - if: + properties: + compatible: + contains: + enum: + - nvidia,tegra194-gte-aon + - nvidia,tegra234-gte-aon + then: + required: + - nvidia,gpio-controller + additionalProperties: false examples: @@ -71,7 +81,7 @@ examples: reg = <0xc1e0000 0x10000>; interrupts = <0 13 0x4>; nvidia,int-threshold = <1>; - nvidia,slices = <3>; + nvidia,gpio-controller = <&gpio_aon>; #timestamp-cells = <1>; }; @@ -81,7 +91,6 @@ examples: reg = <0x3aa0000 0x10000>; interrupts = <0 11 0x4>; nvidia,int-threshold = <1>; - nvidia,slices = <11>; #timestamp-cells = <1>; }; -- 2.17.1