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Sat, 11 Mar 2023 04:40:41 -0800 Date: Sat, 11 Mar 2023 04:40:39 -0800 From: Nicolin Chen To: Robin Murphy CC: , , , , , , , , , , Subject: Re: [PATCH v1 08/14] iommu/arm-smmu-v3: Prepare for nested domain support Message-ID: References: <4740f8a40caf68ccc1f9fee5fcdf1604546fb354.1678348754.git.nicolinc@nvidia.com> <0d1e585d-9a11-3f7b-4faa-dc2aa8f961cc@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <0d1e585d-9a11-3f7b-4faa-dc2aa8f961cc@arm.com> X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM6NAM11FT113:EE_|SN7PR12MB6912:EE_ X-MS-Office365-Filtering-Correlation-Id: 3e10820e-69a5-4696-9c5b-08db222dd69b X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: WdsKRV9pdVXsQfDWfRwRyN2x71VRrwBEVTKMbHV6OL17zMPAUIQaZY+Lp6nszrL6nJYIOKqK+jaVwjZ0pGsG/SHwaLJKGNomZFE472Am5cpTXHos9xT5ZrZevFwwqiwwotw6psJNILpGSMjoRHuXIbpaMP2DsYkxsCkSgECxsVkFPwItpVHYSXAu2zFGr0MhkewAEJt9HWndL06Kce3KNPBCSxYerfvJs4yCqUVwWLX1oSRwbgFvlkcdpVadNnoEGzIHXRKlQilj0+NT8h5QTyVD5TCFJ3rPLJTDS3Da02NozNmMz1mI5BGqY/fSz2Abn9AH8CfemWrEsS9/fYZ2Da5B7kQjf1plkeXeOKZ89qs9fQprGB7VzclaGGlx1dcNfq4XI1LMgFIyy26eyfXNuh9bE6C702c7m5MYHf/9PhtdsVYn3xooodqxt+9ZWk8Yyo+TeC/gm+3pCSMcFqQR65mPPkivw8+6vL9MOu3yqN7mBIEJsKQbCDANwRF4guknJ1d5rnWjAY2Zy5/cTW1GdF8b6fg0b0dPu7EO6Aj3OcwGZERaNZqE+yPFOqGwooBcKSynQlNn9rPf0R4nkhu7LSKY0/G6Cf5jC68hfEJ4aX52R33POIiubsjE3HFbE5aIeKTNVHxeJnnuJWoHZplTvSZgWzr35WzYTFIQ9f+Rvx9S/X1fkBkKHqCd44rGkmMIiqGB3mAieV9hNP9O6qMqRxbc212+ML0gPdosnimx/Qc79MwZAXyjBwnybHrVWw1z X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230025)(4636009)(136003)(39860400002)(346002)(376002)(396003)(451199018)(36840700001)(46966006)(40470700004)(82310400005)(33716001)(82740400003)(36860700001)(426003)(47076005)(478600001)(54906003)(7636003)(55016003)(316002)(356005)(336012)(186003)(40460700003)(26005)(9686003)(40480700001)(70206006)(7416002)(2906002)(5660300002)(8676002)(70586007)(41300700001)(6916009)(4326008)(8936002)(4744005)(86362001);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 Mar 2023 12:40:47.0889 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 3e10820e-69a5-4696-9c5b-08db222dd69b X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT113.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN7PR12MB6912 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Mar 10, 2023 at 08:39:20PM +0000, Robin Murphy wrote: > > @@ -1277,6 +1295,7 @@ static void arm_smmu_write_strtab_ent(struct arm_smmu_master *master, u32 sid, > > switch (smmu_domain->stage) { > > case ARM_SMMU_DOMAIN_S1: > > s1_cfg = &smmu_domain->s1_cfg; > > + s2_cfg = to_s2_cfg(smmu_domain); > > TBH I'd say you only need a 2-line change here. All the other cases > below are when the stage is guaranteed to be ARM_SMMU_DOMAIN_S2 (once > ARM_SMMU_DOMAIN_NESTED is gone), so pretending it might be otherwise > seems unnecessarily confusing. Oh right...I will drop those. Thanks! Nic