Date:   Sat, 11 Mar 2023 13:14:45 +0000
From:   Conor Dooley <conor@kernel.org>
To:     Hal Feng <hal.feng@starfivetech.com>
Cc:     linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
        linux-riscv@lists.infradead.org, Stephen Boyd <sboyd@kernel.org>,
        Michael Turquette <mturquette@baylibre.com>,
        Philipp Zabel <p.zabel@pengutronix.de>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Palmer Dabbelt <palmer@dabbelt.com>,
        Paul Walmsley <paul.walmsley@sifive.com>,
        Albert Ou <aou@eecs.berkeley.edu>,
        Ben Dooks <ben.dooks@sifive.com>,
        Daniel Lezcano <daniel.lezcano@linaro.org>,
        Thomas Gleixner <tglx@linutronix.de>,
        Marc Zyngier <maz@kernel.org>,
        Emil Renner Berthing <emil.renner.berthing@canonical.com>,
        linux-kernel@vger.kernel.org
Subject: Re: [PATCH v5 12/21] dt-bindings: clock: Add StarFive JH7110
 always-on clock and reset generator
Message-ID: <b9a421c0-85df-4c8c-a3cb-8286328c5ed0@spud>
References: <20230311090733.56918-1-hal.feng@starfivetech.com>
 <20230311090733.56918-13-hal.feng@starfivetech.com>
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On Sat, Mar 11, 2023 at 05:07:24PM +0800, Hal Feng wrote:
> From: Emil Renner Berthing <kernel@esmil.dk>
>=20
> Add bindings for the always-on clock and reset generator (AONCRG) on the
> JH7110 RISC-V SoC by StarFive Ltd.
>=20
> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
> Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
> +++ b/Documentation/devicetree/bindings/clock/starfive,jh7110-aoncrg.yaml
> @@ -0,0 +1,107 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/starfive,jh7110-aoncrg.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: StarFive JH7110 Always-On Clock and Reset Generator
> +
> +maintainers:
> +  - Emil Renner Berthing <kernel@esmil.dk>
> +
> +properties:
> +  compatible:
> +    const: starfive,jh7110-aoncrg
> +
> +  reg:
> +    maxItems: 1
> +
> +  clocks:
> +    oneOf:
> +      - items:
> +          - description: Main Oscillator (24 MHz)
> +          - description: GMAC0 RMII reference or GMAC0 RGMII RX
> +          - description: STG AXI/AHB
> +          - description: APB Bus
> +          - description: GMAC0 GTX
> +
> +      - items:
> +          - description: Main Oscillator (24 MHz)
> +          - description: GMAC0 RMII reference or GMAC0 RGMII RX
> +          - description: STG AXI/AHB or GMAC0 RGMII RX
> +          - description: APB Bus or STG AXI/AHB
> +          - description: GMAC0 GTX or APB Bus
> +          - description: RTC Oscillator (32.768 kHz) or GMAC0 GTX

Something tells me that the use of "or" means we're not doing this
correctly.
Otherwise,
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>

Thanks,
Conor.

> +      - items:
> +          - description: Main Oscillator (24 MHz)
> +          - description: GMAC0 RMII reference
> +          - description: GMAC0 RGMII RX
> +          - description: STG AXI/AHB
> +          - description: APB Bus
> +          - description: GMAC0 GTX
> +          - description: RTC Oscillator (32.768 kHz)
> +
> +  clock-names:
> +    oneOf:
> +      - minItems: 5
> +        items:
> +          - const: osc
> +          - enum:
> +              - gmac0_rmii_refin
> +              - gmac0_rgmii_rxin
> +          - const: stg_axiahb
> +          - const: apb_bus
> +          - const: gmac0_gtxclk
> +          - const: rtc_osc
> +
> +      - minItems: 6
> +        items:
> +          - const: osc
> +          - const: gmac0_rmii_refin
> +          - const: gmac0_rgmii_rxin
> +          - const: stg_axiahb
> +          - const: apb_bus
> +          - const: gmac0_gtxclk
> +          - const: rtc_osc


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