Message-ID: <2f64385a350359c5755eb4d2479e2efef7a96216.camel@gmail.com>
Subject: Re: [PATCH net-next v2 4/6] net: mdio: scan bus based on bus
 capabilities for C22 and C45
From:   Klaus Kudielka <klaus.kudielka@gmail.com>
To:     Andrew Lunn <andrew@lunn.ch>
Cc:     Michael Walle <michael@walle.cc>,
        Heiner Kallweit <hkallweit1@gmail.com>,
        Russell King <linux@armlinux.org.uk>,
        "David S. Miller" <davem@davemloft.net>,
        Eric Dumazet <edumazet@google.com>,
        Jakub Kicinski <kuba@kernel.org>,
        Paolo Abeni <pabeni@redhat.com>, Felix Fietkau <nbd@nbd.name>,
        John Crispin <john@phrozen.org>,
        Sean Wang <sean.wang@mediatek.com>,
        Mark Lee <Mark-MC.Lee@mediatek.com>,
        Lorenzo Bianconi <lorenzo@kernel.org>,
        Matthias Brugger <matthias.bgg@gmail.com>,
        Bryan Whitehead <bryan.whitehead@microchip.com>,
        UNGLinuxDriver@microchip.com,
        Giuseppe Cavallaro <peppe.cavallaro@st.com>,
        Alexandre Torgue <alexandre.torgue@foss.st.com>,
        Jose Abreu <joabreu@synopsys.com>,
        Maxime Coquelin <mcoquelin.stm32@gmail.com>,
        Joel Stanley <joel@jms.id.au>,
        Andrew Jeffery <andrew@aj.id.au>, netdev@vger.kernel.org,
        linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
        linux-mediatek@lists.infradead.org,
        linux-stm32@st-md-mailman.stormreply.com,
        linux-aspeed@lists.ozlabs.org,
        Jesse Brandeburg <jesse.brandeburg@intel.com>
Date:   Sat, 11 Mar 2023 17:11:08 +0100
In-Reply-To: <a57a216d-ff5a-46e6-9780-e53772dcefc8@lunn.ch>
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         <0e10aa8492eadb587949d8744b56fccaabbd183b.camel@gmail.com>
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On Sat, 2023-03-11 at 16:39 +0100, Andrew Lunn wrote:
>=20
> I have one more idea which can speed things up. The scanning of the
> MDIO bus works in two different ways depending on if there is a DT
> node, describing what should be found on the bus. For mv88e6xxx, using
> DT is optional. Some boards do, some don't.
>=20
> If there is a DT node, only the addresses listed in DT are scanned.

Here's the definition of the switch in the Turris Omnia device tree.

	/* Switch MV88E6176 at address 0x10 */
	switch@10 {
		pinctrl-names =3D "default";
		pinctrl-0 =3D <&swint_pins>;
		compatible =3D "marvell,mv88e6085";
		#address-cells =3D <1>;
		#size-cells =3D <0>;

		dsa,member =3D <0 0>;
		reg =3D <0x10>;

		interrupt-parent =3D <&gpio1>;
		interrupts =3D <13 IRQ_TYPE_LEVEL_LOW>;

		ports {
			#address-cells =3D <1>;
			#size-cells =3D <0>;

			ports@0 {
				reg =3D <0>;
				label =3D "lan0";
			};

			ports@1 {
				reg =3D <1>;
				label =3D "lan1";
			};

			ports@2 {
				reg =3D <2>;
				label =3D "lan2";
			};

			ports@3 {
				reg =3D <3>;
				label =3D "lan3";
			};

			ports@4 {
				reg =3D <4>;
				label =3D "lan4";
			};

			ports@5 {
				reg =3D <5>;
				label =3D "cpu";
				ethernet =3D <&eth1>;
				phy-mode =3D "rgmii-id";

				fixed-link {
					speed =3D <1000>;
					full-duplex;
				};
			};

			ports@6 {
				reg =3D <6>;
				label =3D "cpu";
				ethernet =3D <&eth0>;
				phy-mode =3D "rgmii-id";

				fixed-link {
					speed =3D <1000>;
					full-duplex;
				};
			};
		};

>=20
> If there is no DT node, by default, all 32 addresses on the bus are
> scanned. However, DSA makes another assumption. There is a one to one
> mapping between port number and PHY address on the MDIO bus. Port 0
> uses MDIO address 0. Port 7 uses MDIO address 7 etc. If you have an 8
> port switch, there is no point scanning addresses 8 to 31, they will
> never be used.
>=20
> The mdio bus structure has a member phy_mask. This is a bitmap. If bit
> N is set, address N is not scanned. So i suggest you extend
> mv88e6xxx_mdio_register() to set phy_mask based on
> mv88e6xxx_num_ports(chip).
>=20

What you are proposing here would not show any improvement on the
Omnia, as only the 6 ports would be scanned - right?=20

> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0Andrew