From:   Peng Fan <peng.fan@nxp.com>
To:     Oleksij Rempel <o.rempel@pengutronix.de>,
        Abel Vesa <abelvesa@kernel.org>,
        Michael Turquette <mturquette@baylibre.com>,
        Stephen Boyd <sboyd@kernel.org>,
        Shawn Guo <shawnguo@kernel.org>,
        Sascha Hauer <s.hauer@pengutronix.de>
CC:     "kernel@pengutronix.de" <kernel@pengutronix.de>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        Fabio Estevam <festevam@gmail.com>,
        dl-linux-imx <linux-imx@nxp.com>,
        "linux-clk@vger.kernel.org" <linux-clk@vger.kernel.org>,
        "linux-arm-kernel@lists.infradead.org" 
        <linux-arm-kernel@lists.infradead.org>
Subject: RE: [PATCH v1] clk: imx6ul: fix "failed to get parent" error
Thread-Topic: [PATCH v1] clk: imx6ul: fix "failed to get parent" error
Thread-Index: AQHZU2+8jn4VzPFqR0+ypgqiFldpoa73HYTQ
Date:   Sun, 12 Mar 2023 12:57:51 +0000
Message-ID: <DU0PR04MB9417D33088377F41D33EF33088B89@DU0PR04MB9417.eurprd04.prod.outlook.com>
References: <20230310164523.534571-1-o.rempel@pengutronix.de>
In-Reply-To: <20230310164523.534571-1-o.rempel@pengutronix.de>
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> Subject: [PATCH v1] clk: imx6ul: fix "failed to get parent" error
>=20
> On some configuration we may get following error:
> [    0.000000] imx:clk-gpr-mux: failed to get parent (-EINVAL)
>=20
> This happens if selector is configured to not supported value. To avoid t=
his
> warnings add dummy parents for not supported values.
>=20
> Fixes: 4e197ee880c2 ("clk: imx6ul: add ethernet refclock mux support")
> Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
[Peng Fan]=20

Reviewed-by: Peng Fan <peng.fan@nxp.com>
> ---
>  drivers/clk/imx/clk-imx6ul.c | 10 ++++++----
>  1 file changed, 6 insertions(+), 4 deletions(-)
>=20
> diff --git a/drivers/clk/imx/clk-imx6ul.c b/drivers/clk/imx/clk-imx6ul.c =
index
> 2836adb817b7..e3696a88b5a3 100644
> --- a/drivers/clk/imx/clk-imx6ul.c
> +++ b/drivers/clk/imx/clk-imx6ul.c
> @@ -95,14 +95,16 @@ static const struct clk_div_table video_div_table[] =
=3D {
>  	{ }
>  };
>=20
> -static const char * enet1_ref_sels[] =3D { "enet1_ref_125m",
> "enet1_ref_pad", };
> +static const char * enet1_ref_sels[] =3D { "enet1_ref_125m",
> +"enet1_ref_pad", "dummy", "dummy"};
>  static const u32 enet1_ref_sels_table[] =3D
> { IMX6UL_GPR1_ENET1_TX_CLK_DIR,
> -					    IMX6UL_GPR1_ENET1_CLK_SEL };
> +					    IMX6UL_GPR1_ENET1_CLK_SEL, 0,
> +
> IMX6UL_GPR1_ENET1_TX_CLK_DIR | IMX6UL_GPR1_ENET1_CLK_SEL };
>  static const u32 enet1_ref_sels_table_mask =3D
> IMX6UL_GPR1_ENET1_TX_CLK_DIR |
>  					     IMX6UL_GPR1_ENET1_CLK_SEL;
> -static const char * enet2_ref_sels[] =3D { "enet2_ref_125m",
> "enet2_ref_pad", };
> +static const char * enet2_ref_sels[] =3D { "enet2_ref_125m",
> +"enet2_ref_pad", "dummy", "dummy"};
>  static const u32 enet2_ref_sels_table[] =3D
> { IMX6UL_GPR1_ENET2_TX_CLK_DIR,
> -					    IMX6UL_GPR1_ENET2_CLK_SEL };
> +					    IMX6UL_GPR1_ENET2_CLK_SEL, 0,
> +
> IMX6UL_GPR1_ENET2_TX_CLK_DIR | IMX6UL_GPR1_ENET2_CLK_SEL };
>  static const u32 enet2_ref_sels_table_mask =3D
> IMX6UL_GPR1_ENET2_TX_CLK_DIR |
>  					     IMX6UL_GPR1_ENET2_CLK_SEL;
>=20
> --
> 2.30.2