Message-ID: <f28489b1-4ece-4f48-e2c0-9bd7755071d8@ti.com>
Date:   Mon, 13 Mar 2023 15:19:18 +0530
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Subject: Re: [PATCH v3] arm64: dts: ti: k3-j721e-main: Remove ti,strobe-sel
 property
To:     Bhavya Kapoor <b-kapoor@ti.com>,
        <linux-arm-kernel@lists.infradead.org>,
        <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>
CC:     <nm@ti.com>, <vigneshr@ti.com>, <kristo@kernel.org>,
        <robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>,
        <a-govindraju@ti.com>, <kishon@ti.com>, <u-kumar1@ti.com>
References: <20230203073724.29529-1-b-kapoor@ti.com>
Content-Language: en-US
From:   Nitin Yadav <n-yadav@ti.com>
In-Reply-To: <20230203073724.29529-1-b-kapoor@ti.com>
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On 2/3/2023 1:07 PM, Bhavya Kapoor wrote:
> According to latest errata of J721e [1], (i2024) 'MMCSD: Peripherals
> Do Not Support HS400' which applies to MMCSD0 subsystem. Speed modes
> supported has been already updated in commit eb8f6194e807 ("arm64: dts: ti: k3-j721e-main: Update the speed modes supported and their itap delay values for MMCSD subsystems")
> but it missed dropping 'ti,strobe-sel' property which is only required
> by HS400 speed mode.
> 
> Thus, drop 'ti,strobe-sel' property from kernel dtsi for J721e SoC.
> 
> [1] https://www.ti.com/lit/er/sprz455/sprz455.pdf
> 
> Fixes: eb8f6194e807 ("arm64: dts: ti: k3-j721e-main: Update the speed modes supported and their itap delay values for MMCSD subsystems")
> Signed-off-by: Bhavya Kapoor <b-kapoor@ti.com>
> ---
>  arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 1 -
>  1 file changed, 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
> index c935622f0102..bfa296dce3a3 100644
> --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
> @@ -1180,7 +1180,6 @@ main_sdhci0: mmc@4f80000 {
>  		ti,itap-del-sel-mmc-hs = <0xa>;
>  		ti,itap-del-sel-ddr52 = <0x3>;
>  		ti,trm-icp = <0x8>;
> -		ti,strobe-sel = <0x77>;
>  		dma-coherent;
>  	};
>
Reviewed-by: Nitin Yadav <n-yadav@ti.com>