From:   Serge Semin <Sergey.Semin@baikalelectronics.ru>
To:     Giuseppe Cavallaro <peppe.cavallaro@st.com>,
        Alexandre Torgue <alexandre.torgue@foss.st.com>,
        Jose Abreu <joabreu@synopsys.com>,
        "David S. Miller" <davem@davemloft.net>,
        Eric Dumazet <edumazet@google.com>,
        Jakub Kicinski <kuba@kernel.org>,
        Paolo Abeni <pabeni@redhat.com>,
        Maxime Coquelin <mcoquelin.stm32@gmail.com>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
CC:     Serge Semin <Sergey.Semin@baikalelectronics.ru>,
        Serge Semin <fancer.lancer@gmail.com>,
        Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>,
        Pavel Parkhomenko <Pavel.Parkhomenko@baikalelectronics.ru>,
        Christian Marangi <ansuelsmth@gmail.com>,
        Richard Cochran <richardcochran@gmail.com>,
        Biao Huang <biao.huang@mediatek.com>,
        Yang Yingliang <yangyingliang@huawei.com>,
        <devicetree@vger.kernel.org>, <netdev@vger.kernel.org>,
        <linux-stm32@st-md-mailman.stormreply.com>,
        <linux-arm-kernel@lists.infradead.org>,
        <linux-kernel@vger.kernel.org>
Subject: [PATCH net-next 10/16] dt-bindings: net: dwmac: Add AXI-bus properties constraints
Date:   Tue, 14 Mar 2023 01:50:57 +0300
Message-ID: <20230313225103.30512-11-Sergey.Semin@baikalelectronics.ru>
In-Reply-To: <20230313225103.30512-1-Sergey.Semin@baikalelectronics.ru>
References: <20230313225103.30512-1-Sergey.Semin@baikalelectronics.ru>
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Currently none of the AXI-bus non-boolean DT-properties have constraints
defined meanwhile they can be specified at least based on the
corresponding device configs. Let's do that:
+ snps,wr_osr_lm/snps,rd_osr_lmt - maximum number of outstanding AXI-bus
read/write requests is limited with the IP-core synthesize parameter
AXI_MAX_{RD,WR}_REQ. DW MAC/GMAC: <= 16, DW Eth QoS: <= 32, DW xGMAC: <=
64. The least restrictive constraint is defined since the DT-schema is
common for all IP-cores.
+ snps,blen - array of the burst lengths supported by the AXI-bus. Values
are limited by the AXI3/4 bus standard, available AXI/System bus CSR flags
and the AXI-bus IP-core synthesize config . All DW *MACs support setting
the burst length within the set: 4, 8, 16, 32, 64, 128, 256. If some burst
length is unsupported a zero value can be specified instead in the array.

Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
---
 Documentation/devicetree/bindings/net/snps,dwmac.yaml | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
index d1b2910b799b..f24718a8d184 100644
--- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml
+++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
@@ -484,11 +484,17 @@ properties:
         $ref: /schemas/types.yaml#/definitions/uint32
         description:
           max write outstanding req. limit
+        default: 1
+        minimum: 1
+        maximum: 64
 
       snps,rd_osr_lmt:
         $ref: /schemas/types.yaml#/definitions/uint32
         description:
           max read outstanding req. limit
+        default: 1
+        minimum: 1
+        maximum: 64
 
       snps,kbbe:
         $ref: /schemas/types.yaml#/definitions/uint32
@@ -501,6 +507,8 @@ properties:
           this is a vector of supported burst length.
         minItems: 7
         maxItems: 7
+        items:
+          enum: [256, 128, 64, 32, 16, 8, 4, 0]
 
       snps,fb:
         $ref: /schemas/types.yaml#/definitions/flag
-- 
2.39.2