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References: <20230306140543.1813621-1-angelogioacchino.delregno@collabora.com> <6c52bcda08b62593c541d52e269d3982.sboyd@kernel.org>
In-Reply-To: <6c52bcda08b62593c541d52e269d3982.sboyd@kernel.org>
From:   Chen-Yu Tsai <wenst@chromium.org>
Date:   Tue, 14 Mar 2023 14:48:12 +0800
Message-ID: <CAGXv+5E+SsN085WHzdLGzdWGMwpWLNhgyR5NvobOf75sPG0cRA@mail.gmail.com>
Subject: Re: [PATCH v6 00/54] MediaTek clocks: full module build and cleanups
To:     Stephen Boyd <sboyd@kernel.org>
Cc:     AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@collabora.com>, mturquette@baylibre.com,
        matthias.bgg@gmail.com, johnson.wang@mediatek.com,
        miles.chen@mediatek.com, chun-jie.chen@mediatek.com,
        daniel@makrotopia.org, fparent@baylibre.com, msp@baylibre.com,
        nfraprado@collabora.com, rex-bc.chen@mediatek.com,
        zhaojh329@gmail.com, sam.shih@mediatek.com,
        edward-jw.yang@mediatek.com, yangyingliang@huawei.com,
        granquet@baylibre.com, pablo.sun@mediatek.com,
        sean.wang@mediatek.com, chen.zhong@mediatek.com,
        linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org,
        linux-arm-kernel@lists.infradead.org,
        linux-mediatek@lists.infradead.org, kernel@collabora.com
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On Tue, Mar 14, 2023 at 7:22=E2=80=AFAM Stephen Boyd <sboyd@kernel.org> wro=
te:
>
> Quoting AngeloGioacchino Del Regno (2023-03-06 06:04:49)
> >
> > This huge series adds more cleanups on top, reducing size and adding mo=
re
> > commonization for clock drivers probe/remove, which also includes a new
> > common probe mechanism for multimedia clock drivers that are usually
> > probed by mtk-mmsys instead of a dt clock node: thanks to this, it was
> > finally possible to convert almost all clock drivers to the common prob=
e
> > mechanism, which *finally again* makes us able to build all these drive=
rs
> > as modules!
> >
> > Since this looked like being *the* way forward, I went on converting so=
me
> > more drivers away from OF_CLK_DECLARE_DRIVER to full platform_driver(s)=
,
> > allowing for more (actually, almost all!) drivers to be built as module=
s.
> >
> > While at it, I also added some more consistency in macros usage by
> > removing all of the duplicated full macro declaration for MediaTek gate
> > clocks and replacing all of those with using the GATE_MTK macro instead=
,
> > producing a nice reduction in amount of lines per file but, more
> > importantly, improving readability and eventual future batch changes.
> >
> > This amount of commonization will also, in my opinion, greatly improve
> > the review process for new clock drivers, as they will be mostly just a
> > list of clocks and won't contain much new code, as it's all going to be
> > handled in the common places, which also reduces chances to see new clo=
ck
> > driver related bugs emerging on one SoC or the other.
> >
> > Since I don't own devices with all of the supported MediaTek SoCs, I
> > could not test some of the conversions on real hardware... but I am
> > confident that this will work as the drivers are *very* similar on a
> > per-generation basis.
> >
> > This series was build-tested for all (both module and built-in build)
> > and was manually tested on MT6795, MT8173, MT8192, MT8195.
> >
>
> Applied the whole series to clk-next.

Hadn't gotten around to retesting this. FWIW,

Tested-by: Chen-Yu Tsai <wenst@chromium.org>

on MT8183, MT8186, MT8192, MT8195