Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 74CE6C7618A for ; Tue, 14 Mar 2023 15:26:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230426AbjCNP01 (ORCPT ); Tue, 14 Mar 2023 11:26:27 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52828 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231196AbjCNP0Y (ORCPT ); Tue, 14 Mar 2023 11:26:24 -0400 Received: from lelv0143.ext.ti.com (lelv0143.ext.ti.com [198.47.23.248]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5BADFA90A8; Tue, 14 Mar 2023 08:26:21 -0700 (PDT) Received: from lelv0266.itg.ti.com ([10.180.67.225]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 32EFQC0s033125; Tue, 14 Mar 2023 10:26:12 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1678807572; bh=rCSe3awC47T3cNdH3EF+HwUDzp5NAPmqi6MhcDNsK94=; h=From:To:CC:Subject:Date; b=htQvNmPc46BB8mi+AiLviv0zOgsa6oPRFi00jeTR34PpUAEpBe10JTvKIjz1vGcaY qnN6pyiA0DZ359kGQ5WF+ZRjROcQnlMmCsKxsMPcjQKYeu727MYTxvTShs74u5lizp b7uAK2q4jjtWE83ozzlKH9M07u1rfFeHcra4+68g= Received: from DLEE112.ent.ti.com (dlee112.ent.ti.com [157.170.170.23]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 32EFQCeI104797 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 14 Mar 2023 10:26:12 -0500 Received: from DLEE115.ent.ti.com (157.170.170.26) by DLEE112.ent.ti.com (157.170.170.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16; Tue, 14 Mar 2023 10:26:12 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE115.ent.ti.com (157.170.170.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16 via Frontend Transport; Tue, 14 Mar 2023 10:26:12 -0500 Received: from localhost (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 32EFQBRu001628; Tue, 14 Mar 2023 10:26:12 -0500 From: Jayesh Choudhary To: , CC: , , , , , , , , , Subject: [PATCH v2 0/2] Add Crypto Support for J784S4 SoC Date: Tue, 14 Mar 2023 20:56:09 +0530 Message-ID: <20230314152611.140969-1-j-choudhary@ti.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This series adds the crypto node for sa2ul for j784s4 platform. First patch adds the device-id for NAVSS without which the probe for dma-controller fails due to 'ti,sci-dev-id' read failure. Second patch adds the crypto node. This series has functional dependency on j784s4 k3_soc_id[1] and PSIL-thread support[2] but it does not affect the boot. [1]: [2]: For testing the crypto support, crypto extra tests and self tests were enabled and tcrypt tests were used to verify SHA-1/256/512, AES and DES3 algorithms. Changelog v1->v2: - add deviceID for mcu_navss as well and add the 'Fixes:' tag - retain 'Reviewed-by' tag in both patches from v1: Jayesh Choudhary (2): arm64: dts: ti: k3-j784s4-*: Add 'ti,sci-dev-id' for NAVSS nodes arm64: dts: ti: k3-j784s4-main: Enable crypto accelerator arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 20 +++++++++++++++++++ .../boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi | 1 + 2 files changed, 21 insertions(+) -- 2.25.1