Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 445F8C05027 for ; Tue, 14 Mar 2023 17:15:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229789AbjCNRPF (ORCPT ); Tue, 14 Mar 2023 13:15:05 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47728 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231230AbjCNROr (ORCPT ); Tue, 14 Mar 2023 13:14:47 -0400 Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id ED64D16310 for ; Tue, 14 Mar 2023 10:14:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1678814073; x=1710350073; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=8maF+MyMRN8PyFjPic/AWZFEI8hxeFF4uDFIm6V9zAY=; b=eixqsI8VNWTmFBXA6NRjz1hmHyyBCqjHncD4fq1hpJJswFTj+BNis5OV gqnfO5Ctb7fOSzq4IXeemENU5+dAxvIZ5/v8gmu+VylynqVpa+v2ggYPa NpsxAYn/tgK+jgu+nT7lMdOoZKKrjHlGC4klN6LWhhdi7Eto2xxqJIBGM tTD8uWz8bVLL0yHUxu53YlvXD2CRnf6tWSVLsBcoYIRRXpp2Ym/djeB/H llIH3QjDD+Oo/TRqxwX3k7SLSQn6rUm9dJxPS0h3Ug8wfJTIL2hoNqClb y3kCebfOE0+BnuY9Un0/VT2XJ2qIifT892B22Dn1w+iyesCIDCUf1IUb1 A==; X-IronPort-AV: E=McAfee;i="6500,9779,10649"; a="334976464" X-IronPort-AV: E=Sophos;i="5.98,260,1673942400"; d="scan'208";a="334976464" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Mar 2023 10:14:33 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10649"; a="743385788" X-IronPort-AV: E=Sophos;i="5.98,260,1673942400"; d="scan'208";a="743385788" Received: from novermar-mobl.ger.corp.intel.com (HELO intel.com) ([10.251.219.242]) by fmsmga008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Mar 2023 10:14:30 -0700 Date: Tue, 14 Mar 2023 18:14:27 +0100 From: Andi Shyti To: Andrzej Hajda Cc: Jani Nikula , Joonas Lahtinen , Rodrigo Vivi , Tvrtko Ursulin , intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Andi Shyti , Chris Wilson , Nirmoy Das Subject: Re: [PATCH v6 1/2] drm/i915/gt: introduce vm->scratch_range callback Message-ID: References: <20230308-guard_error_capture-v6-0-1b5f31422563@intel.com> <20230308-guard_error_capture-v6-1-1b5f31422563@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20230308-guard_error_capture-v6-1-1b5f31422563@intel.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Andrzej, On Fri, Mar 10, 2023 at 10:23:49AM +0100, Andrzej Hajda wrote: > The callback will be responsible for setting scratch page PTEs for > specified range. In contrast to clear_range it cannot be optimized to nop. > It will be used by code adding guard pages. > > Signed-off-by: Andrzej Hajda Reviewed-by: Andi Shyti Thanks, Andi