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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: BN9PR11MB5276.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: d547bd52-4221-468d-39ba-08db25ed8071 X-MS-Exchange-CrossTenant-originalarrivaltime: 16 Mar 2023 07:10:19.4799 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: mpY5qQKeXVg8sUAshG/wzQ0WFX1/laIDYuO7PkcYXjmAK6HEXzOuSADKNWNdo2ftDfyPdraXe90CF20a5eovzA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR11MB7757 X-OriginatorOrg: intel.com Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > From: Lu Baolu > Sent: Thursday, March 9, 2023 10:57 AM >=20 > Generally enabling IOMMU_DEV_FEAT_SVA requires > IOMMU_DEV_FEAT_IOPF, but > some devices manage I/O Page Faults themselves instead of relying on the > IOMMU. Move IOPF related code from SVA to IOPF enabling path. >=20 > For the device drivers that relies on the IOMMU for IOPF through PCI/PRI, > IOMMU_DEV_FEAT_IOPF must be enabled before and disabled after > IOMMU_DEV_FEAT_SVA. >=20 > Signed-off-by: Lu Baolu Reviewed-by: Kevin Tian