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[83.9.29.16]) by smtp.gmail.com with ESMTPSA id u28-20020ac243dc000000b004db2978e330sm1194222lfl.258.2023.03.16.04.17.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Mar 2023 04:17:08 -0700 (PDT) From: Konrad Dybcio Date: Thu, 16 Mar 2023 12:16:56 +0100 Subject: [PATCH 1/5] dt-bindings: clock: qcom,gpucc: Fix SM6350 clock names MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20230315-topic-lagoon_gpu-v1-1-a74cbec4ecfc@linaro.org> References: <20230315-topic-lagoon_gpu-v1-0-a74cbec4ecfc@linaro.org> In-Reply-To: <20230315-topic-lagoon_gpu-v1-0-a74cbec4ecfc@linaro.org> To: Bjorn Andersson , Andy Gross , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , AngeloGioacchino Del Regno Cc: Marijn Suijten , Rob Herring , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1678965426; l=1659; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=bpaAXA5y4g96VwCAJK9chz5FYE16LKwf+GCJo/Dh+04=; b=Jild5AY0GLW3IlK/0sO5nZu7MvhQrlDmN5ABPy6VIRbq5sH0zdDzJyWVgYFZkV1dqSaHbcjDa8ah 60eKja2ND5+/d/+W42zSyRGM0uDlHxgiIq4CiB4Jr8+5kd3WG32y X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org SM6350 GPUCC uses the same clock names as the rest of the gang, except without a _src suffix. Account for that. Fixes: 7b91b9d8cc6c ("dt-bindings: clock: add SM6350 QCOM Graphics clock bindings") Signed-off-by: Konrad Dybcio --- .../devicetree/bindings/clock/qcom,gpucc.yaml | 29 +++++++++++++++++++--- 1 file changed, 25 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml b/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml index db53eb288995..d209060a619d 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml @@ -43,10 +43,8 @@ properties: - description: GPLL0 div branch source clock-names: - items: - - const: bi_tcxo - - const: gcc_gpu_gpll0_clk_src - - const: gcc_gpu_gpll0_div_clk_src + minItems: 3 + maxItems: 3 '#clock-cells': const: 1 @@ -71,6 +69,29 @@ required: additionalProperties: false +allOf: + - if: + properties: + compatible: + items: + - const: qcom,sm6350-gpucc + + then: + properties: + clock-names: + items: + - const: bi_tcxo + - const: gcc_gpu_gpll0_clk + - const: gcc_gpu_gpll0_div_clk + + else: + properties: + clock-names: + items: + - const: bi_tcxo + - const: gcc_gpu_gpll0_clk_src + - const: gcc_gpu_gpll0_div_clk_src + examples: - | #include -- 2.39.2