Date:   Thu, 16 Mar 2023 20:54:55 +0800
From:   Hongren Zheng <i@zenithal.me>
To:     Palmer Dabbelt <palmer@rivosinc.com>
Cc:     Kito Cheng <kito.cheng@gmail.com>,
        Nelson Chu <nelson.chu@sifive.com>,
        Atish Patra <atishp@rivosinc.com>,
        linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] RISC-V: cpu.c: remove nonexistent ext from cpuinfo
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On Mon, Jun 13, 2022 at 02:20:57AM +0800, Hongren Zheng wrote:
> On Wed, Jun 01, 2022 at 08:52:42PM -0700, Palmer Dabbelt wrote:
> > On Wed, 18 May 2022 01:40:18 PDT (-0700), i@zenithal.me wrote:
> > > On Tue, Apr 26, 2022 at 06:08:01AM +0800, Hongren (Zenithal) Zheng wrote:
> > > > There are no single-letter B/K/J extentions,
> > > > as they are never ratified. For P, it is still in
> > > > progress and not ratified.
> > > > 
> > > > The ordering constraint of these placerholders is now removed
> > > > from the spec. By commit ("Delete more nonexistent
> > > > extensions from the naming constraints") of riscv/riscv-isa-manual
> > > 
> > > Hi, is there any further update on this patch?
> > 
> > IIRC there was some debate as to whether that change constituted an
> > incompatible change to the spec, but I guess it's stuck around for long
> > enough that maybe we should count on it being canon now?  I added Kito and
> > Nelson, there's a GNU toolchain call tomorrow morning so hopefully we can
> > remember to talk about it...
> 
> Hi, I'm curious about the output of the meeting, any update on this?
> 
> > 
> > > 
> > > > 
> > > > Signed-off-by: Hongren (Zenithal) Zheng <i@zenithal.me>
> > > > ---
> > > >  arch/riscv/kernel/cpu.c | 4 +---
> > > >  1 file changed, 1 insertion(+), 3 deletions(-)
> > > > 
> > > > diff --git a/arch/riscv/kernel/cpu.c b/arch/riscv/kernel/cpu.c
> > > > index ccb617791e56..53a061ab0743 100644
> > > > --- a/arch/riscv/kernel/cpu.c
> > > > +++ b/arch/riscv/kernel/cpu.c
> > > > @@ -113,10 +113,8 @@ static void print_isa_ext(struct seq_file *f)
> > > >  /*
> > > >   * These are the only valid base (single letter) ISA extensions as per the spec.
> > > >   * It also specifies the canonical order in which it appears in the spec.
> > > > - * Some of the extension may just be a place holder for now (B, K, P, J).
> > > > - * This should be updated once corresponding extensions are ratified.
> > > >   */
> > > > -static const char base_riscv_exts[13] = "imafdqcbkjpvh";
> > > > +static const char base_riscv_exts[9] = "imafdqcvh";
> > > 
> > > The base_riscv_exts "imafdqcvh" is exactly the spec now, as
> > > https://github.com/riscv/riscv-isa-manual/commit/db7a4a0dad0e99d1ec1fc67b582624fc0aeae98e
> > > (Add single-letter "H" extension to the table)
> > > has shown
> > 
> > Oddly enough I stumbled upon that one this morning, it's another one of
> > these like the HPM stuff: we used to say "there's no letter describing the
> > hypervisor behavior, so it's part of the base" (see the commentary on the
> > binutils patch), but now that there's a letter I'm assuming we should split
> > that out?
> 
> I'm afraid I could not help here because I'm not familiar with this area.
> 
> > 
> > Not clear if the RISC-V folks want H to be ignored by software like those
> > other recent changes, and if so it's also not clear that's a good idea.
> > 
> > Anyway, sorry this is taking a while but I think it's going to be too late
> > for this merge window -- kind of silly for such a small patch, but it's got
> > interface implications and it's all a bit of a hot topic right now.

This PATCH still applies. Might there be some update? Can we safely
pick this PATCH?

> > 
> > > 
> > > > 
> > > >  static void print_isa(struct seq_file *f, const char *isa)
> > > >  {
> > > > --
> > > > 2.35.1
> > > >