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([2a02:810d:15c0:828:9827:5f65:8269:a95f]) by smtp.gmail.com with ESMTPSA id t1-20020a170906178100b008d1dc5f5692sm17887eje.76.2023.03.16.12.29.50 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 16 Mar 2023 12:29:51 -0700 (PDT) Message-ID: Date: Thu, 16 Mar 2023 20:29:50 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.9.0 Subject: Re: [PATCH 1/2] dt-bindings: arm-smmu: Document SM61[12]5 GPU SMMU Content-Language: en-US To: Konrad Dybcio , Will Deacon , Robin Murphy , Joerg Roedel , Rob Herring , Krzysztof Kozlowski , Andy Gross , Bjorn Andersson Cc: Marijn Suijten , linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org References: <20230315-topic-kamorta_adrsmmu-v1-0-d1c0dea90bd9@linaro.org> <20230315-topic-kamorta_adrsmmu-v1-1-d1c0dea90bd9@linaro.org> From: Krzysztof Kozlowski In-Reply-To: <20230315-topic-kamorta_adrsmmu-v1-1-d1c0dea90bd9@linaro.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 15/03/2023 11:52, Konrad Dybcio wrote: > Both of these SoCs have a Qualcomm MMU500 implementation of SMMU > in front of their GPUs that expect 3 clocks. Both of them also have > an APPS SMMU that expects no clocks. Remove qcom,sm61[12]5-smmu-500 > from the "no clocks" list (intentionally 'breaking' the schema checks > of APPS SMMU, as now it *can* accept clocks - with the current > structure of this file it would have taken a wastefully-long time to > sort this out properly..) and add necessary yaml to describe the > clocks required by the GPU SMMUs. > + properties: > + compatible: > + items: > + - enum: > + - qcom,sm6115-smmu-500 > + - qcom,sm6125-smmu-500 > + - const: qcom,adreno-smmu > + - const: qcom,smmu-500 > + - const: arm,mmu-500 If you drop the hunk later (from allOf:if), then what clocks do you expect for non-GPU SMMU? > + then: > + properties: > + clock-names: > + items: > + - const: mem > + - const: hlos > + - const: iface > + > + clocks: > + items: > + - description: GPU memory bus clock > + - description: Voter clock required for HLOS SMMU access > + - description: Interface clock required for register access > + > # Disallow clocks for all other platforms with specific compatibles > - if: > properties: > @@ -394,8 +420,6 @@ allOf: > - qcom,sdm845-smmu-500 > - qcom,sdx55-smmu-500 > - qcom,sdx65-smmu-500 > - - qcom,sm6115-smmu-500 > - - qcom,sm6125-smmu-500 > - qcom,sm6350-smmu-500 > - qcom,sm6375-smmu-500 > - qcom,sm8350-smmu-500 > Best regards, Krzysztof