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([2a02:810d:15c0:828:848a:1971:93e0:b465]) by smtp.gmail.com with ESMTPSA id lt11-20020a170906fa8b00b008e54ac90de1sm701978ejb.74.2023.03.17.01.44.34 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 17 Mar 2023 01:44:35 -0700 (PDT) Message-ID: <79593668-6ded-7290-f39b-e226d30e6e95@linaro.org> Date: Fri, 17 Mar 2023 09:44:34 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.9.0 Subject: Re: [PATCH v3 5/5] dts: usb: add StarFive JH7110 USB dts configuration. Content-Language: en-US To: Minda Chen , Emil Renner Berthing , Conor Dooley , Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Pawel Laszczak , Greg Kroah-Hartman , Peter Chen , Roger Quadros , Philipp Zabel Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-usb@vger.kernel.org, linux-riscv@lists.infradead.org, Paul Walmsley , Palmer Dabbelt , Albert Ou References: <20230315104411.73614-1-minda.chen@starfivetech.com> <20230315104411.73614-6-minda.chen@starfivetech.com> From: Krzysztof Kozlowski In-Reply-To: <20230315104411.73614-6-minda.chen@starfivetech.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 15/03/2023 11:44, Minda Chen wrote: > USB Glue layer and Cadence USB subnode configuration, > also includes USB and PCIe phy dts configuration. > > Signed-off-by: Minda Chen Use subject prefixes matching the subsystem (which you can get for example with `git log --oneline -- DIRECTORY_OR_FILE` on the directory your patch is touching). > --- > .../jh7110-starfive-visionfive-2.dtsi | 7 +++ > arch/riscv/boot/dts/starfive/jh7110.dtsi | 54 +++++++++++++++++++ > 2 files changed, 61 insertions(+) > > diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi > index a132debb9b53..c64476aebc1a 100644 > --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi > +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi > @@ -236,3 +236,10 @@ > pinctrl-0 = <&uart0_pins>; > status = "okay"; > }; > + > +&usb0 { > + status = "okay"; > + usbdrd_cdns3: usb@0 { You should rather override by phandle this as well. > + dr_mode = "peripheral"; > + }; > +}; > diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi > index f70a4ed47eb4..17722fd1be62 100644 > --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi > +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi > @@ -362,6 +362,60 @@ > status = "disabled"; > }; > > + usb0: usb@10100000 { > + compatible = "starfive,jh7110-usb"; > + clocks = <&stgcrg JH7110_STGCLK_USB0_LPM>, > + <&stgcrg JH7110_STGCLK_USB0_STB>, > + <&stgcrg JH7110_STGCLK_USB0_APB>, > + <&stgcrg JH7110_STGCLK_USB0_AXI>, > + <&stgcrg JH7110_STGCLK_USB0_UTMI_APB>; > + clock-names = "lpm", "stb", "apb", "axi", "utmi_apb"; > + resets = <&stgcrg JH7110_STGRST_USB0_PWRUP>, > + <&stgcrg JH7110_STGRST_USB0_APB>, > + <&stgcrg JH7110_STGRST_USB0_AXI>, > + <&stgcrg JH7110_STGRST_USB0_UTMI_APB>; > + starfive,stg-syscon = <&stg_syscon 0x4 0xc4 0x148 0x1f4>; > + starfive,sys-syscon = <&sys_syscon 0x18>; > + status = "disabled"; > + #address-cells = <1>; > + #size-cells = <1>; > + ranges = <0x0 0x0 0x10100000 0x100000>; reg and ranges should be second property. This also applies to your binding example. Best regards, Krzysztof