Message-ID: <baa1dbbc-14a7-d9fb-33f0-d5f22b32282a@collabora.com>
Date:   Fri, 17 Mar 2023 10:18:54 +0100
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Subject: Re: [PATCH v4 7/7] arm64: dts: mediatek: mt8186: Add display nodes
Content-Language: en-US
To:     Allen-KH Cheng <allen-kh.cheng@mediatek.com>,
        Matthias Brugger <matthias.bgg@gmail.com>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Stephen Boyd <sboyd@kernel.org>
Cc:     Project_Global_Chrome_Upstream_Group@mediatek.com,
        devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
        linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org,
        hsinyi@chromium.org
References: <20230317060917.15175-1-allen-kh.cheng@mediatek.com>
 <20230317060917.15175-8-allen-kh.cheng@mediatek.com>
From:   AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@collabora.com>
In-Reply-To: <20230317060917.15175-8-allen-kh.cheng@mediatek.com>
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Precedence: bulk

Il 17/03/23 07:09, Allen-KH Cheng ha scritto:
> Add display nodes and the GCE (Global Command Engine) properties
> to the display nodes in order to enable the usage of the CMDQ
> (Command Queue), which is required for operating the display.
> 
> Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
> ---
>   arch/arm64/boot/dts/mediatek/mt8186.dtsi | 125 +++++++++++++++++++++++
>   1 file changed, 125 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
> index b9d5af26771e..29fb970e174e 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
> @@ -20,6 +20,13 @@
>   	#address-cells = <2>;
>   	#size-cells = <2>;
>   
> +	aliases {
> +		ovl0 = &ovl0;
> +		ovl_2l0 = &ovl_2l0;
> +		rdma0 = &rdma0;
> +		rdma1 = &rdma1;
> +	};
> +
>   	cpus {
>   		#address-cells = <1>;
>   		#size-cells = <0>;
> @@ -1251,6 +1258,20 @@
>   			reg = <0 0x14000000 0 0x1000>;
>   			#clock-cells = <1>;
>   			#reset-cells = <1>;
> +			mboxes = <&gce 0 CMDQ_THR_PRIO_HIGHEST>,
> +				 <&gce 1 CMDQ_THR_PRIO_HIGHEST>;

Fits in one line.

> +			mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0 0x1000>;
> +		};
> +
> +		mutex: mutex@14001000 {
> +			compatible = "mediatek,mt8186-disp-mutex";
> +			reg = <0 0x14001000 0 0x1000>;
> +			clocks = <&mmsys CLK_MM_DISP_MUTEX0>;
> +			interrupts = <GIC_SPI 295 IRQ_TYPE_LEVEL_HIGH 0>;
> +			mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0x1000 0x1000>;
> +			mediatek,gce-events = <CMDQ_EVENT_DISP_STREAM_DONE_ENG_EVENT_0>,
> +					      <CMDQ_EVENT_DISP_STREAM_DONE_ENG_EVENT_1>;
> +			power-domains = <&spm MT8186_POWER_DOMAIN_DIS>;
>   		};
>   
>   		smi_common: smi@14002000 {
> @@ -1284,6 +1305,49 @@
>   			power-domains = <&spm MT8186_POWER_DOMAIN_DIS>;
>   		};
>   
> +		ovl0: ovl@14005000 {
> +			compatible = "mediatek,mt8186-disp-ovl",
> +				     "mediatek,mt8192-disp-ovl";

Fits in one line.

> +			reg = <0 0x14005000 0 0x1000>;
> +			clocks = <&mmsys CLK_MM_DISP_OVL0>;
> +			interrupts = <GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH 0>;
> +			iommus = <&iommu_mm IOMMU_PORT_L0_OVL_RDMA0>;
> +			mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x5000 0x1000>;
> +			power-domains = <&spm MT8186_POWER_DOMAIN_DIS>;
> +		};
> +
> +		ovl_2l0: ovl@14006000 {
> +			compatible = "mediatek,mt8186-disp-ovl-2l",
> +				     "mediatek,mt8192-disp-ovl-2l";

Same

> +			reg = <0 0x14006000 0 0x1000>;
> +			clocks = <&mmsys CLK_MM_DISP_OVL0_2L>;
> +			interrupts = <GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH 0>;
> +			iommus = <&iommu_mm IOMMU_PORT_L1_OVL_2L_RDMA0>;
> +			mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x6000 0x1000>;
> +			power-domains = <&spm MT8186_POWER_DOMAIN_DIS>;
> +		};
> +
> +		rdma0: rdma@14007000 {
> +			compatible = "mediatek,mt8186-disp-rdma",
> +				     "mediatek,mt8183-disp-rdma";

ditto

> +			reg = <0 0x14007000 0 0x1000>;
> +			clocks = <&mmsys CLK_MM_DISP_RDMA0>;
> +			interrupts = <GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH 0>;
> +			iommus = <&iommu_mm IOMMU_PORT_L1_DISP_RDMA0>;
> +			mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x7000 0x1000>;
> +			power-domains = <&spm MT8186_POWER_DOMAIN_DIS>;
> +		};
> +
> +		color: color@14009000 {
> +			compatible = "mediatek,mt8186-disp-color",
> +				     "mediatek,mt8173-disp-color";

again.... and again, and again, and again :-)

Please compress the compatible strings in one single line here and in other
instances of the same (ccorr/aal/gamma/dither/rdma). Postmask doesn't fit.

After which:

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>