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([2a05:6e02:1041:c10:1dfd:dcd7:94d3:86b3]) by smtp.googlemail.com with ESMTPSA id n13-20020a05600c3b8d00b003e8dcc67bdesm8058955wms.30.2023.03.17.04.57.28 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 17 Mar 2023 04:57:29 -0700 (PDT) Message-ID: <59fc344b-4d1a-e0b2-92b5-2341b014ae11@linaro.org> Date: Fri, 17 Mar 2023 12:57:28 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.7.1 Subject: Re: [PATCH 1/4] dt-bindings: thermal: mediatek: Add AP domain to LVTS thermal controllers for mt8195 Content-Language: en-US To: Rob Herring Cc: Chen-Yu Tsai , bchihi@baylibre.com, angelogioacchino.delregno@collabora.com, rafael@kernel.org, amitk@kernel.org, rui.zhang@intel.com, matthias.bgg@gmail.com, krzysztof.kozlowski+dt@linaro.org, rdunlap@infradead.org, ye.xingchen@zte.com.cn, p.zabel@pengutronix.de, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, khilman@baylibre.com, james.lo@mediatek.com, rex-bc.chen@mediatek.com References: <20230307154524.118541-1-bchihi@baylibre.com> <20230307154524.118541-2-bchihi@baylibre.com> <20230316223543.GA4008428-robh@kernel.org> From: Daniel Lezcano In-Reply-To: <20230316223543.GA4008428-robh@kernel.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Rob, On 16/03/2023 23:35, Rob Herring wrote: > On Thu, Mar 09, 2023 at 11:39:13AM +0100, Daniel Lezcano wrote: >> On 09/03/2023 05:40, Chen-Yu Tsai wrote: >>> On Wed, Mar 8, 2023 at 12:46 AM wrote: >>>> >>>> From: Balsam CHIHI >>>> >>>> Add AP Domain to LVTS thermal controllers dt-binding definition for mt8195. >>>> >>>> Signed-off-by: Balsam CHIHI >>>> --- >>>> include/dt-bindings/thermal/mediatek,lvts-thermal.h | 10 ++++++++++ >>>> 1 file changed, 10 insertions(+) >>>> >>>> diff --git a/include/dt-bindings/thermal/mediatek,lvts-thermal.h b/include/dt-bindings/thermal/mediatek,lvts-thermal.h >>>> index c09398920468..8fa5a46675c4 100644 >>>> --- a/include/dt-bindings/thermal/mediatek,lvts-thermal.h >>>> +++ b/include/dt-bindings/thermal/mediatek,lvts-thermal.h >>>> @@ -16,4 +16,14 @@ >>>> #define MT8195_MCU_LITTLE_CPU2 6 >>>> #define MT8195_MCU_LITTLE_CPU3 7 >>>> >>>> +#define MT8195_AP_VPU0 8 >>> >>> Can't this start from 0? This is a different hardware block. The index >>> namespace is separate. Same question for MT8192. >> >> The ID is used to differentiate the thermal zone identifier in the device >> tree from the driver. >> >> + vpu0-thermal { >> + polling-delay = <0>; >> + polling-delay-passive = <0>; >> + thermal-sensors = <&lvts_ap MT8195_AP_VPU0>; >> + >> + trips { >> + vpu0_crit: trip-crit { >> + temperature = <100000>; >> + hysteresis = <2000>; >> + type = "critical"; >> + }; >> + }; >> + }; >> >> If MT8195_AP_VPU0 is 0, then the code won't be able to differentiate >> MT8195_AP_VPU0 and MT8195_MCU_BIG_CPU0 >> >> The LVTS driver will call devm_thermal_of_zone_register() with the sensor >> id. If MT8195_MCU_BIG_CPU0 and MT8195_AP_VPU0 have the same id, then at the >> moment of registering the MT8195_AP_VPU0, the underlying OF thermal >> framework code will use MT8195_MCU_BIG_CPU0 description instead because it >> will be the first to be find in the DT. >> >> If MT8195_AP_VPU0 is described in DT before, then the same will happen when >> registering MT8195_MCU_BIG_CPU0, MT8195_AP_VPU0 will be registered instead. >> >> IOW all ids must be different. > > That's broken for how producer/consumer phandle+args bindings work. Do you mean this is broken for thermal zone description in the DT in general ? What would be the correct approach ? -- Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog