Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6497CC6FD1D for ; Fri, 17 Mar 2023 14:25:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230458AbjCQOZk (ORCPT ); Fri, 17 Mar 2023 10:25:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44590 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229643AbjCQOZi (ORCPT ); Fri, 17 Mar 2023 10:25:38 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5DFA1559CB for ; Fri, 17 Mar 2023 07:25:34 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 0E325B825AA for ; Fri, 17 Mar 2023 14:25:33 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 337D7C433EF; Fri, 17 Mar 2023 14:25:29 +0000 (UTC) Date: Fri, 17 Mar 2023 14:25:26 +0000 From: Catalin Marinas To: Kristina Martsenko Cc: linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, Will Deacon , Marc Zyngier , Oliver Upton , James Morse , Suzuki K Poulose , Zenghui Yu , Mark Rutland , Mark Brown , Luis Machado , Vladimir Murzin , linux-kernel@vger.kernel.org Subject: Re: [PATCH 01/10] KVM: arm64: initialize HCRX_EL2 Message-ID: References: <20230216160012.272345-1-kristina.martsenko@arm.com> <20230216160012.272345-2-kristina.martsenko@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20230216160012.272345-2-kristina.martsenko@arm.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Feb 16, 2023 at 04:00:03PM +0000, Kristina Martsenko wrote: > ARMv8.7/9.2 adds a new hypervisor configuration register HCRX_EL2. > Initialize the register to a safe value (all fields 0), to be robust > against firmware that has not initialized it. I think the risk of firmware not initialising this register is small given that EL3 needs to set SCR_EL3.HXEn to allow EL2 access. But it doesn't hurt to re-initialise it in the hypervisor. > diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S > index 212d93aca5e6..e06b34322339 100644 > --- a/arch/arm64/kernel/head.S > +++ b/arch/arm64/kernel/head.S > @@ -572,6 +572,13 @@ SYM_INNER_LABEL(init_el2, SYM_L_LOCAL) > msr hcr_el2, x0 > isb > > + mrs x0, ID_AA64MMFR1_EL1 > + ubfx x0, x0, #ID_AA64MMFR1_EL1_HCX_SHIFT, #4 > + cbz x0, 3f > + mov_q x1, HCRX_HOST_FLAGS > + msr_s SYS_HCRX_EL2, x1 > + isb > +3: > init_el2_state Nitpick: we can probably leave a single ISB after both HCR_EL2 and HCRX_EL2 are initialised. Well, we could probably drop all of them altogether, there's at least one down this path. > > /* Hypervisor stub */ > diff --git a/arch/arm64/kvm/hyp/nvhe/hyp-init.S b/arch/arm64/kvm/hyp/nvhe/hyp-init.S > index a6d67c2bb5ae..01f854697c70 100644 > --- a/arch/arm64/kvm/hyp/nvhe/hyp-init.S > +++ b/arch/arm64/kvm/hyp/nvhe/hyp-init.S > @@ -95,6 +95,12 @@ SYM_CODE_START_LOCAL(___kvm_hyp_init) > ldr x1, [x0, #NVHE_INIT_HCR_EL2] > msr hcr_el2, x1 > > + mrs x1, ID_AA64MMFR1_EL1 > + ubfx x1, x1, #ID_AA64MMFR1_EL1_HCX_SHIFT, #4 > + cbz x1, 1f > + mov_q x2, HCRX_HOST_FLAGS > + msr_s SYS_HCRX_EL2, x2 > +1: Maybe you could use a macro to avoid writing this sequence twice. I lost track of the KVM initialisation refactoring since pKVM, it looks like the other register values are loaded from a structure here. I guess a value of 0 doesn't make sense to store (unless at a later point it becomes non-zero). -- Catalin