Date:   Fri, 17 Mar 2023 15:28:17 +0100
From:   Andrew Lunn <andrew@lunn.ch>
To:     Nicolas Ferre <nicolas.ferre@microchip.com>
Cc:     Bartosz Wawrzyniak <bwawrzyn@cisco.com>, davem@davemloft.net,
        edumazet@google.com, kuba@kernel.org, pabeni@redhat.com,
        claudiu.beznea@microchip.com, netdev@vger.kernel.org,
        linux-kernel@vger.kernel.org, xe-linux-external@cisco.com,
        danielwa@cisco.com, olicht@cisco.com, mawierzb@cisco.com
Subject: Re: [PATCH] net: macb: Set MDIO clock divisor for pclk higher than
 160MHz
Message-ID: <1636986a-9748-4a37-aaf0-945590c042c8@lunn.ch>
References: <20230316100339.1302212-1-bwawrzyn@cisco.com>
 <7f3d0f2c-8bf9-41aa-8a7f-79407753df3b@lunn.ch>
 <3a625bc5-80ed-925d-2e16-bc3535320963@microchip.com>
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Content-Disposition: inline
In-Reply-To: <3a625bc5-80ed-925d-2e16-bc3535320963@microchip.com>
Precedence: bulk

> I see them existing in all variants of "GEM" controller and the older "MACB"
> uses a different path so I think that we are save enabling these values.

Great. Thanks for checking.

Reviewed-by: Andrew Lunn <andrew@lunn.ch>

FYI: Documentation/devicetree/bindings/net/mdio.yaml defines:

  clock-frequency:
    description:
      Desired MDIO bus clock frequency in Hz. Values greater than IEEE 802.3
      defined 2.5MHz should only be used when all devices on the bus support
      the given clock speed.

So you could if you want make the bus speed configurable. Some devices
do work at faster than 2.5MHz, which can be nice if you have a lot of
traffic, e.g. an Ethernet switch, or raw TDR cable test data.

    Andrew