From:   Kevin Groeneveld <kgroeneveld@lenbrook.com>
To:     Andrzej Hajda <andrzej.hajda@intel.com>,
        Neil Armstrong <neil.armstrong@linaro.org>,
        Robert Foss <rfoss@kernel.org>,
        Laurent Pinchart <Laurent.pinchart@ideasonboard.com>,
        Jonas Karlman <jonas@kwiboo.se>,
        Jernej Skrabec <jernej.skrabec@gmail.com>,
        David Airlie <airlied@gmail.com>,
        Daniel Vetter <daniel@ffwll.ch>,
        dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org
Cc:     Kevin Groeneveld <kgroeneveld@lenbrook.com>
Subject: [PATCH] drm/bridge: nwl-dsi: implement MIPI_DSI_MODE_NO_EOT_PACKET
Date:   Sat, 18 Mar 2023 18:33:56 -0400
Message-Id: <20230318223357.3899-1-kgroeneveld@lenbrook.com>
Content-Transfer-Encoding: 8bit
Content-Type: text/plain
MIME-Version: 1.0
X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1
X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?DKBG1BYnouKyJUAihCLvq3zp/XbUsbKTA0Jwh+BPQ68YfaED3kEQADBxpOkp?=
 =?us-ascii?Q?xxFNdvtDkkua4uLyKk5lya2gC3T7HXkCsCiq6KyUkq/+f5fPHAfPe4nlb19+?=
 =?us-ascii?Q?hUOYmBN0GMErwQZc7cgN4UL0Xb5mE6lacvJmZS2b4x/za+gL7xEQaMXlBIfw?=
 =?us-ascii?Q?Zi5+PCvadF43rygeluy1xl76HRbaqgQPKSgNQTJ2xnkVigko+Un2Ko+oJJ51?=
 =?us-ascii?Q?2p9/kdpXDiEFDWBSYEPodcUJQg2p1JtU674WRpVQpDYKVAsR0fM+LeiE0Bs7?=
 =?us-ascii?Q?9S9qr3vs40wLsEw2eYG2A+a6mhNXCIBSTTeuij7mY44q8QFELM6dU5SsI2Uv?=
 =?us-ascii?Q?vhHCY2s0tk3znspIH00LAxcPAGc2lGtBIcRnb2gDkwE4xJ4dvB7a+qPuYoZk?=
 =?us-ascii?Q?gBgeQddpNTl7aSGewcN6au57LNSGmrCkSLLPDfO07t4Ci+JNNGsyTLApAowF?=
 =?us-ascii?Q?jzQK0NlYQLaYvwZ/28kd5Uh39Z/cqU9l/B7LNfWyhIYM+LYrB7nMNYLfoXZx?=
 =?us-ascii?Q?EGe6/D2zFCbPr1rGCQj16JIG39fvD9JlwjE3i3j33ZsYNqsAK+UeJGpduu93?=
 =?us-ascii?Q?SRFajFfXdh7Ib/IagD5GRDn3x+TQwQmZ9imQh0yGNL8NqyfcoRpuWpcjHbA1?=
 =?us-ascii?Q?/CHJdIQ4gDEmDVZeob53uKkdH/AkRWazUqpnBm/F+Zi4V3uDqlRknoxgl4Xc?=
 =?us-ascii?Q?3IBOfBvRQOehm8Yf2XWz5l4a0Xc7+Vzn2EOAXGUHqo3cDM4srw6c+dG3pngj?=
 =?us-ascii?Q?mYIxNGa02W7UhkrVPmLtsHSEB82oH+YWxxKB5AHkhNHRyGkivKzm89EQXjB9?=
 =?us-ascii?Q?v22TJ2Jc3RslQQmq6Bfazv4kD+8orGbHzaEHciBZ7PwA7k5kvK9DMterrA+9?=
 =?us-ascii?Q?XyJPHN+utDekwB63h91SmV3zmWhs3Lrk0OrMrFl+kc+NQJU5UPbYeBROMOd+?=
 =?us-ascii?Q?lf4LeepDMg38hkCjlQuX3ExpT5G9twcyBF4OjtBXpgzdZXMJPrdxONZHZbxe?=
 =?us-ascii?Q?MpIQphoaA8wfnbtcqOKH3OUPxkSOWBwdAXJqKo6wyO4rJFZ9nixu3dIKGyLl?=
 =?us-ascii?Q?hAJRMTPebhy0w4kHK1KAZwsvK1+FJZaEH9GvwmZxQPeQOrH2htxERAeqoXaO?=
 =?us-ascii?Q?40pXgQ17SBsta/ZVqY8VEI+GYvYRAv3acv2AbJJj2c0EChvXeEHr805Tu2TP?=
 =?us-ascii?Q?DAqsXJw/Dg/5fojcx0yUXXX+xPFqO+jlayZy2ImlWN4tmOIyS0kMnjynWlwU?=
 =?us-ascii?Q?IUCu8MrN6hnvrLHy6zS62cdYNAXm/q4Qxz9Qso8L+m5dZTW9Mnw8xI4/SsmB?=
 =?us-ascii?Q?U9eEdP3TRKmbxmI1zY880cp7SdNqW4s6yIujg1NO5VivggOSEMTIrxmPunhi?=
 =?us-ascii?Q?Iy8s9YCkhQdcWAyuON2NT3oqIffP8Y1QSyiQl4Or1fYy/26zolPS0fTg0Y6A?=
 =?us-ascii?Q?mOwTssCzeGtW6qELCMvxwciC+1rrUx1Lg5c2OfX6xnoSFy65tiS6qsl8Rnx7?=
 =?us-ascii?Q?OlGZjTuhv25yECnM/CRlJbAVJ6CwQfIPFeoB7/qEHfQYUZj06n3lnvTwTJpx?=
 =?us-ascii?Q?MPzAxbYZEIhx7GpfcjnyLAgPg8tFegacSbBBPU9McokNfYFoJmFjcwQSpcXm?=
 =?us-ascii?Q?XA=3D=3D?=
X-OriginatorOrg: lenbrook.com
X-MS-Exchange-CrossTenant-Network-Message-Id: 88cf8a02-8cd1-4e4b-51d7-08db2800ea28
X-MS-Exchange-CrossTenant-AuthSource: YT4PR01MB9670.CANPRD01.PROD.OUTLOOK.COM
X-MS-Exchange-CrossTenant-AuthAs: Internal
X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Mar 2023 22:34:19.7304
 (UTC)
X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted
X-MS-Exchange-CrossTenant-Id: 3089fb55-f9f3-4ac8-ba44-52ac0e467cb6
X-MS-Exchange-CrossTenant-MailboxType: HOSTED
X-MS-Exchange-CrossTenant-UserPrincipalName: PQVSJjdWQ/W5z8NxQG0cAQuzKaDlQFXcZ1EMVrdoIcf2KQg8XH1lP8s4RYsSnaPNv4w+Y9AmTwB/SlIO1WMfIjZI/qIWxx6BkkvBNw95JT8=
X-MS-Exchange-Transport-CrossTenantHeadersStamped: YT2PR01MB8856
Precedence: bulk
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org

Previously EOT packets were only being enabled when
MIPI_DSI_CLOCK_NON_CONTINUOUS was set in the dsi_mode_flags. However this
really should be based on MIPI_DSI_MODE_NO_EOT_PACKET instead.

Some displays require EOT packets and a continuous clock which was an
impossible combination to achieve with the current driver.

Signed-off-by: Kevin Groeneveld <kgroeneveld@lenbrook.com>
---
 drivers/gpu/drm/bridge/nwl-dsi.c | 13 +++++--------
 1 file changed, 5 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/bridge/nwl-dsi.c b/drivers/gpu/drm/bridge/nwl-dsi.c
index 6dc2a4e191d7..bb8404ffd3f5 100644
--- a/drivers/gpu/drm/bridge/nwl-dsi.c
+++ b/drivers/gpu/drm/bridge/nwl-dsi.c
@@ -211,7 +211,7 @@ static u32 us2lp(u32 lp_clk_rate, unsigned long us)
 
 static int nwl_dsi_config_host(struct nwl_dsi *dsi)
 {
-	u32 cycles;
+	u32 val, cycles;
 	struct phy_configure_opts_mipi_dphy *cfg = &dsi->phy_cfg.mipi_dphy;
 
 	if (dsi->lanes < 1 || dsi->lanes > 4)
@@ -220,13 +220,8 @@ static int nwl_dsi_config_host(struct nwl_dsi *dsi)
 	DRM_DEV_DEBUG_DRIVER(dsi->dev, "DSI Lanes %d\n", dsi->lanes);
 	nwl_dsi_write(dsi, NWL_DSI_CFG_NUM_LANES, dsi->lanes - 1);
 
-	if (dsi->dsi_mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS) {
-		nwl_dsi_write(dsi, NWL_DSI_CFG_NONCONTINUOUS_CLK, 0x01);
-		nwl_dsi_write(dsi, NWL_DSI_CFG_AUTOINSERT_EOTP, 0x01);
-	} else {
-		nwl_dsi_write(dsi, NWL_DSI_CFG_NONCONTINUOUS_CLK, 0x00);
-		nwl_dsi_write(dsi, NWL_DSI_CFG_AUTOINSERT_EOTP, 0x00);
-	}
+	val = (dsi->dsi_mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS) ? 0x01 : 0x00;
+	nwl_dsi_write(dsi, NWL_DSI_CFG_NONCONTINUOUS_CLK, val);
 
 	/* values in byte clock cycles */
 	cycles = ui2bc(cfg->clk_pre);
@@ -241,6 +236,8 @@ static int nwl_dsi_config_host(struct nwl_dsi *dsi)
 	DRM_DEV_DEBUG_DRIVER(dsi->dev, "cfg_tx_gap: 0x%x\n", cycles);
 	nwl_dsi_write(dsi, NWL_DSI_CFG_TX_GAP, cycles);
 
+	val = (dsi->dsi_mode_flags & MIPI_DSI_MODE_NO_EOT_PACKET) ? 0x00 : 0x01;
+	nwl_dsi_write(dsi, NWL_DSI_CFG_AUTOINSERT_EOTP, val);
 	nwl_dsi_write(dsi, NWL_DSI_CFG_EXTRA_CMDS_AFTER_EOTP, 0x01);
 	nwl_dsi_write(dsi, NWL_DSI_CFG_HTX_TO_COUNT, 0x00);
 	nwl_dsi_write(dsi, NWL_DSI_CFG_LRX_H_TO_COUNT, 0x00);
-- 
2.34.1