Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 07183C6FD1D for ; Mon, 20 Mar 2023 11:14:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231142AbjCTLN5 (ORCPT ); Mon, 20 Mar 2023 07:13:57 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60532 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229653AbjCTLNe (ORCPT ); Mon, 20 Mar 2023 07:13:34 -0400 Received: from sin.source.kernel.org (sin.source.kernel.org [145.40.73.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E4BB6241C2; Mon, 20 Mar 2023 04:11:00 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sin.source.kernel.org (Postfix) with ESMTPS id 1A8C6CE1255; Mon, 20 Mar 2023 11:10:59 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 58416C433EF; Mon, 20 Mar 2023 11:10:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1679310657; bh=PO8rFWVjDQ03FjCBwUu+d7DAMWi1Byr7dRcudlhPKho=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=Cf6yTgiIgSlzwaVDhmF9455r7gJ64sp75RN3etwodQR6etvuSDj5r6DC5cNTS9sHq fpXhmeJuuDyaWfetHKv1OCJCJMgpd9S919Yyz7YD+svag/qiOlnYLY0+m3nng5QZ0A py+QfjhlMybrLpQck7R3axvxn+amwxW7PEwC6osD0U7qC07OezNtxWXbfyHb0McAg/ Ac+qxWXb2wCeF0AyJv/CZh3L3jyNo30GdVTqQgALGDpMdhffwfTULJEdw/h6RK4oCk 2rSqpVscJZquhqgBCH/746z6/t8dztSTzkPlGK5fqLLOOe7l715gzr/yhwRGJEGj3C TdeYTfST+RXPg== Received: from [82.3.55.74] (helo=wait-a-minute.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1peDPi-001b6K-Pe; Mon, 20 Mar 2023 11:10:54 +0000 Date: Mon, 20 Mar 2023 11:10:46 +0000 Message-ID: <87ttyfhe4p.wl-maz@kernel.org> From: Marc Zyngier To: Linus Walleij Cc: linux-gpio@vger.kernel.org, Bartosz Golaszewski , Manivannan Sadhasivam , Thorsten Scherer , Uwe =?UTF-8?B?S2xlaW5lLUvDtm5pZw==?= , Pengutronix Kernel Team , Maxime Coquelin , Alexandre Torgue , Robert Richter , Nobuhiro Iwamatsu , Ray Jui , Scott Branden , Broadcom internal kernel review list , Shubhrajyoti Datta , Srinivas Neeli , Michal Simek , linux-arm-kernel@lists.infradead.org, linux-unisoc@lists.infradead.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Subject: Re: [PATCH 0/9] Mass convert GPIO IRQ chips to be immutable part 2 In-Reply-To: <20230316-immutable-chips-2-v1-0-053d6ede831b@linaro.org> References: <20230316-immutable-chips-2-v1-0-053d6ede831b@linaro.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 82.3.55.74 X-SA-Exim-Rcpt-To: linus.walleij@linaro.org, linux-gpio@vger.kernel.org, brgl@bgdev.pl, mani@kernel.org, t.scherer@eckelmann.de, u.kleine-koenig@pengutronix.de, kernel@pengutronix.de, mcoquelin.stm32@gmail.com, alexandre.torgue@foss.st.com, rric@kernel.org, nobuhiro1.iwamatsu@toshiba.co.jp, rjui@broadcom.com, sbranden@broadcom.com, bcm-kernel-feedback-list@broadcom.com, shubhrajyoti.datta@xilinx.com, srinivas.neeli@xilinx.com, michal.simek@xilinx.com, linux-arm-kernel@lists.infradead.org, linux-unisoc@lists.infradead.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, 20 Mar 2023 09:55:07 +0000, Linus Walleij wrote: > > Following up on my first series with this second series > concluding all the low-hanging immutable irqchip conversions > in the GPIO subsystem. These are all I could easily > convert. > > The remaining irqchips are not using the GPIOLIB_IRQCHIP > for one or another reason, or too complex for me to > deal with. Mostly they are using generic irqchip, and > I guess those are fine as-is. > > Signed-off-by: Linus Walleij FWIW: Reviewed-by: Marc Zyngier M. -- Without deviation from the norm, progress is not possible.